{"schemaVersion":"jobsearcher.job.v1","id":"9d3a5d858b33f27498da1a62","url":"https://jobsearcher.com/jobs/9d3a5d858b33f27498da1a62","canonicalUrl":"https://jobsearcher.com/jobs/9d3a5d858b33f27498da1a62","title":"Sr. Hardware Engineer","description":"Sr. Hardware Engineer\n\nDate: Sep 10, 2026\n\nLocation: San Jose, California, United States\n\nCompany: Super Micro Computer\n\nJob Req ID: 30146\nAbout Supermicro:\n\nSupermicro® is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. We are the #5 fastest growing company among the Silicon Valley Top 50 technology firms. Our unprecedented global expansion has provided us with the opportunity to offer a large number of new positions to the technology community. We seek talented, passionate, and committed engineers, technologists, and business leaders to join us.\n\nJob Summary:\n\nWe are seeking an experienced and proactive Senior Power DC-DC Hardware Engineer to drive end-to-end power delivery design for next-generation server platforms. In this role, you will lead the architecture, schematic design, layout constraint definitions, and comprehensive validation of complex board-level DC-DC converters and voltage regulator modules (VRMs). You will serve as a technical subject matter expert, resolving complex cross-functional challenges and mentoring junior engineers.\n\nThe ideal candidate is self-motivated, results-driven, and passionate about developing best-in-class server products with outstanding performance and reliability.\n\nEssential Duties and Responsibilities:\nPower Architecture & Design: Lead the end-to-end design, schematic capture, and BOM selection for high-current server motherboard DC-DC power delivery systems, including multiphase voltage regulator modules (VRMs), point-of-load (POL) regulators, and power management circuits.\nComponent Evaluation & Modeling: Perform component sizing, worst-case stress analysis, power loss calculations, and safe operating area (SOA) assessments for MOSFETs, power stages, inductors, controllers, and passive filtering networks.\nPCB Layout & PI Direction: Establish PCB power layer stackup constraints, define high-current routing strategies to minimize parasitic inductance and loop resistance, and collaborate closely with CAD/layout engineers on power integrity (PI) and EMI compliance.\nHardware Bring-Up & Lab Validation: Direct the bring-up, loop stability compensation, dynamic load transient tuning, ripple/noise verification, and power efficiency profiling across line, load, and temperature extremes.\nCross-Functional Issue Resolution: Drive root-cause investigations and failure analysis (FMEA) for complex board- and system-level power anomalies in coordination with signal integrity, thermal, mechanical, firmware, and validation teams.\nDesign Standards & Vendor Alignment: Interface with silicon partners and component vendors on custom part evaluations, roadmap alignment, and technical support; establish and document internal power design guidelines, review checklists, and validation standards.\nTechnical Mentorship: Review schematics and layout artwork from junior engineers, providing technical guidance and mentoring across the hardware engineering team.\nQualifications:\nEducation: Bachelor’s or master’s degree in electrical engineering, Power Electronics, Computer Engineering, or a related discipline.\nExperience: Minimum of 5+ years of hands-on hardware engineering experience with a primary focus on board-level DC-DC power design and server or enterprise computing hardware.\nTechnical Proficiencies:\nIn-depth expertise in switch-mode power supply (SMPS) topologies (synchronous buck, multiphase buck, boost, isolated/non-isolated DC-DC converters).\nStrong knowledge of multiphase VR controllers (e.g., IMVP/VR13/VR14 or equivalent), smart power stages (SPS/DrMOS), and digital power telemetry (PMBus, I2C, SVID).\nProficiency in schematic capture and netlist management tools (e.g., Cadence Allegro Design Entry HDL / OrCAD Capture).\nAdvanced lab skills using high-bandwidth digital oscilloscopes, electronic loads, programmable DC power supplies, frequency response analyzers .\nSolid understanding of server power architectures, enterprise CPU/GPU/memory power delivery constraints, and fault protection mechanisms (OVP, OCP, UVP, OTP).\nCommunication & Leadership: Proven track record of independently driving power hardware projects, resolving high-impact technical blockers, and collaborating effectively across multidisciplinary engineering teams.\nSalary Range\n\n$155,000 - $175,000\n\nThe offered will depend on several factors, including your location, level, education, training, specific skills, years of experience, and comparison to other employees already in this role. In addition to a comprehensive benefits package, candidates may be eligible for other forms of compensation, such as participation in bonus and equity award programs.\n\nEEO Statement\n\nSupermicro is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of Supermicro to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.","company":"Super Micro Computer","rawCompany":"super micro computer","city":"San Jose","state":"CA","isRemote":false,"isActive":true,"createdAt":"2026-09-12T10:19:26.329Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"}],"industries":[{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Sr. Hardware Engineer","description":"Sr. Hardware Engineer\n\nDate: Sep 10, 2026\n\nLocation: San Jose, California, United States\n\nCompany: Super Micro Computer\n\nJob Req ID: 30146\nAbout Supermicro:\n\nSupermicro® is a Top Tier provider of advanced server, storage, and networking solutions for Data Center, Cloud Computing, Enterprise IT, Hadoop/ Big Data, Hyperscale, HPC and IoT/Embedded customers worldwide. We are the #5 fastest growing company among the Silicon Valley Top 50 technology firms. Our unprecedented global expansion has provided us with the opportunity to offer a large number of new positions to the technology community. We seek talented, passionate, and committed engineers, technologists, and business leaders to join us.\n\nJob Summary:\n\nWe are seeking an experienced and proactive Senior Power DC-DC Hardware Engineer to drive end-to-end power delivery design for next-generation server platforms. In this role, you will lead the architecture, schematic design, layout constraint definitions, and comprehensive validation of complex board-level DC-DC converters and voltage regulator modules (VRMs). You will serve as a technical subject matter expert, resolving complex cross-functional challenges and mentoring junior engineers.\n\nThe ideal candidate is self-motivated, results-driven, and passionate about developing best-in-class server products with outstanding performance and reliability.\n\nEssential Duties and Responsibilities:\nPower Architecture & Design: Lead the end-to-end design, schematic capture, and BOM selection for high-current server motherboard DC-DC power delivery systems, including multiphase voltage regulator modules (VRMs), point-of-load (POL) regulators, and power management circuits.\nComponent Evaluation & Modeling: Perform component sizing, worst-case stress analysis, power loss calculations, and safe operating area (SOA) assessments for MOSFETs, power stages, inductors, controllers, and passive filtering networks.\nPCB Layout & PI Direction: Establish PCB power layer stackup constraints, define high-current routing strategies to minimize parasitic inductance and loop resistance, and collaborate closely with CAD/layout engineers on power integrity (PI) and EMI compliance.\nHardware Bring-Up & Lab Validation: Direct the bring-up, loop stability compensation, dynamic load transient tuning, ripple/noise verification, and power efficiency profiling across line, load, and temperature extremes.\nCross-Functional Issue Resolution: Drive root-cause investigations and failure analysis (FMEA) for complex board- and system-level power anomalies in coordination with signal integrity, thermal, mechanical, firmware, and validation teams.\nDesign Standards & Vendor Alignment: Interface with silicon partners and component vendors on custom part evaluations, roadmap alignment, and technical support; establish and document internal power design guidelines, review checklists, and validation standards.\nTechnical Mentorship: Review schematics and layout artwork from junior engineers, providing technical guidance and mentoring across the hardware engineering team.\nQualifications:\nEducation: Bachelor’s or master’s degree in electrical engineering, Power Electronics, Computer Engineering, or a related discipline.\nExperience: Minimum of 5+ years of hands-on hardware engineering experience with a primary focus on board-level DC-DC power design and server or enterprise computing hardware.\nTechnical Proficiencies:\nIn-depth expertise in switch-mode power supply (SMPS) topologies (synchronous buck, multiphase buck, boost, isolated/non-isolated DC-DC converters).\nStrong knowledge of multiphase VR controllers (e.g., IMVP/VR13/VR14 or equivalent), smart power stages (SPS/DrMOS), and digital power telemetry (PMBus, I2C, SVID).\nProficiency in schematic capture and netlist management tools (e.g., Cadence Allegro Design Entry HDL / OrCAD Capture).\nAdvanced lab skills using high-bandwidth digital oscilloscopes, electronic loads, programmable DC power supplies, frequency response analyzers .\nSolid understanding of server power architectures, enterprise CPU/GPU/memory power delivery constraints, and fault protection mechanisms (OVP, OCP, UVP, OTP).\nCommunication & Leadership: Proven track record of independently driving power hardware projects, resolving high-impact technical blockers, and collaborating effectively across multidisciplinary engineering teams.\nSalary Range\n\n$155,000 - $175,000\n\nThe offered will depend on several factors, including your location, level, education, training, specific skills, years of experience, and comparison to other employees already in this role. In addition to a comprehensive benefits package, candidates may be eligible for other forms of compensation, such as participation in bonus and equity award programs.\n\nEEO Statement\n\nSupermicro is an Equal Opportunity Employer and embraces diversity in our employee population. It is the policy of Supermicro to provide equal opportunity to all qualified applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or special disabled veteran, marital status, pregnancy, genetic information, or any other legally protected status.","datePosted":"2026-09-12T10:19:26.329Z","dateModified":"2026-09-12T10:19:26.329Z","hiringOrganization":{"@type":"Organization","name":"Super Micro Computer","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Jose","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"9d3a5d858b33f27498da1a62"},"url":"https://jobsearcher.com/jobs/9d3a5d858b33f27498da1a62"}}