{"schemaVersion":"jobsearcher.job.v1","id":"9a63cd189bfdcdd4aef1b279","url":"https://jobsearcher.com/jobs/9a63cd189bfdcdd4aef1b279","canonicalUrl":"https://jobsearcher.com/jobs/9a63cd189bfdcdd4aef1b279","title":"Design Verification Engineer","description":"We have an exciting opportunity for a Design Verification Engineer in Krakow, Poland\n\nJob Title: Design Verification Engineer\n\nLocation: Krakow, Poland (On-site)\n\nType: Permanent\n\nSalary: Salary range: 14,000 – 16,500 PLN gross/month\n\nApprox. €38,640 – €45,540 per year\n\nI’m currently hiring for a Design Verification Engineer role in Krakow, and I think it could be a strong match based on your background.\n\nThis is a company working at the heart of semiconductor innovation, helping teams design and integrate complex SoCs used across smartphones, EVs, smart devices, drones, satellites, and cloud datacentres, essentially the technology powering modern computing everywhere.\n\nWhy this role is exciting:\n\nWork on advanced SoC assembly and register generation flows\n\nInfluence verification, tooling, and methodology in a highly technical EDA environment\n\nContribute to technologies used across automotive, consumer electronics, AI, and high-performance computing\n\nWhat you’ll do:\n\nDevelop and execute simulation-based verification for a Register Bank compiler (Cadence, Synopsys, Siemens tools)\n\nBuild Python-based validation flows (IP‑XACT, C headers, documentation)\n\nEnhance CI pipelines, automation, and verification metrics\n\nCollaborate with developers on testing strategies and participate in code reviews\n\nWhat they’re looking for:\n\n7+ years RTL/DV experience\n\nStrong SystemVerilog + UVM expertise\n\nSolid Python scripting skills\n\nUnderstanding of VHDL/Verilog\n\nExperience with IP‑XACT / C‑HAL / equivalence checking (nice to have)\n\nCurious, autonomous, and quality-driven mindset\n\nWhy consider it:\n\nPermanent role with a competitive, negotiable salary\n\nStrong technical ownership and impact on methodology\n\nCollaborative, engineering-driven environment\n\nIf this sounds interesting, I’d be happy to share more details. Would you be open to a quick chat?\n\nFeel free to send your CV to tee@microtech-global.com or reach out with any questions.\n\n#J-18808-Ljbffr","company":"Microtech Global","rawCompany":"microtech global","city":"Poland","state":"NY","isRemote":false,"isActive":false,"createdAt":"2026-06-17T04:22:15.389Z","occupations":[{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Design Verification Engineer","description":"We have an exciting opportunity for a Design Verification Engineer in Krakow, Poland\n\nJob Title: Design Verification Engineer\n\nLocation: Krakow, Poland (On-site)\n\nType: Permanent\n\nSalary: Salary range: 14,000 – 16,500 PLN gross/month\n\nApprox. €38,640 – €45,540 per year\n\nI’m currently hiring for a Design Verification Engineer role in Krakow, and I think it could be a strong match based on your background.\n\nThis is a company working at the heart of semiconductor innovation, helping teams design and integrate complex SoCs used across smartphones, EVs, smart devices, drones, satellites, and cloud datacentres, essentially the technology powering modern computing everywhere.\n\nWhy this role is exciting:\n\nWork on advanced SoC assembly and register generation flows\n\nInfluence verification, tooling, and methodology in a highly technical EDA environment\n\nContribute to technologies used across automotive, consumer electronics, AI, and high-performance computing\n\nWhat you’ll do:\n\nDevelop and execute simulation-based verification for a Register Bank compiler (Cadence, Synopsys, Siemens tools)\n\nBuild Python-based validation flows (IP‑XACT, C headers, documentation)\n\nEnhance CI pipelines, automation, and verification metrics\n\nCollaborate with developers on testing strategies and participate in code reviews\n\nWhat they’re looking for:\n\n7+ years RTL/DV experience\n\nStrong SystemVerilog + UVM expertise\n\nSolid Python scripting skills\n\nUnderstanding of VHDL/Verilog\n\nExperience with IP‑XACT / C‑HAL / equivalence checking (nice to have)\n\nCurious, autonomous, and quality-driven mindset\n\nWhy consider it:\n\nPermanent role with a competitive, negotiable salary\n\nStrong technical ownership and impact on methodology\n\nCollaborative, engineering-driven environment\n\nIf this sounds interesting, I’d be happy to share more details. Would you be open to a quick chat?\n\nFeel free to send your CV to tee@microtech-global.com or reach out with any questions.\n\n#J-18808-Ljbffr","datePosted":"2026-06-17T04:22:15.389Z","dateModified":"2026-06-17T04:22:15.389Z","hiringOrganization":{"@type":"Organization","name":"Microtech Global","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Poland","addressRegion":"NY","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"9a63cd189bfdcdd4aef1b279"},"url":"https://jobsearcher.com/jobs/9a63cd189bfdcdd4aef1b279"}}