{"schemaVersion":"jobsearcher.job.v1","id":"98e8494e8a661ec9c8df7da9","url":"https://jobsearcher.com/jobs/98e8494e8a661ec9c8df7da9","canonicalUrl":"https://jobsearcher.com/jobs/98e8494e8a661ec9c8df7da9","title":"Verification Engineer","description":"Description:Hands-on experience with VC Formal (Synopsys) and/or Jasper Gold (Cadence)Strong proficiency in System Verilog Assertions (SVA) and formal property specificationExperience with formal verification applications: FPV, connectivity checking, register verification, equivalence checking, and coverage analysisFamiliarity with scripting languages (TCL, Python, Perl) for flow automationExtensive experience in design verification with a strong focus on formal verificationExpertise in System Verilog and UVM-based verification methodologies - Nice to have","company":"Tech Providers","rawCompany":"tech providers","city":"Austin","state":"TX","isRemote":false,"isActive":false,"createdAt":"2026-10-27T12:33:56.355Z","occupations":[{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"15-1253.00","title":"Software Quality Assurance Analysts and Testers","slug":"software-quality-assurance-analysts-and-testers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"}],"industries":[{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"},{"code":"541511","title":"Custom Computer Programming Services","slug":"custom-computer-programming-services"},{"code":"541330","title":"Engineering Services","slug":"engineering-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Verification Engineer","description":"Description:Hands-on experience with VC Formal (Synopsys) and/or Jasper Gold (Cadence)Strong proficiency in System Verilog Assertions (SVA) and formal property specificationExperience with formal verification applications: FPV, connectivity checking, register verification, equivalence checking, and coverage analysisFamiliarity with scripting languages (TCL, Python, Perl) for flow automationExtensive experience in design verification with a strong focus on formal verificationExpertise in System Verilog and UVM-based verification methodologies - Nice to have","datePosted":"2026-10-27T12:33:56.355Z","dateModified":"2026-10-27T12:33:56.355Z","hiringOrganization":{"@type":"Organization","name":"Tech Providers","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Austin","addressRegion":"TX","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"98e8494e8a661ec9c8df7da9"},"url":"https://jobsearcher.com/jobs/98e8494e8a661ec9c8df7da9"}}