{"schemaVersion":"jobsearcher.job.v1","id":"8ee645efe148dd75284e8cf3","url":"https://jobsearcher.com/jobs/8ee645efe148dd75284e8cf3","canonicalUrl":"https://jobsearcher.com/jobs/8ee645efe148dd75284e8cf3","title":"Lead CPU Performance Architect","description":"In most instances, this position requires in-person interviews as part of the hiring process.\nNote: By applying to this position you will have an opportunity to share your preferred working location from the following: Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA.\nMinimum qualifications:\nBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.\n10 years of experience with CPU microarchitecture design and performance modeling.\nExperience with software performance analysis and improvement, and high performance computer architectures (e.g., CPU, memory subsystem, multiprocessing).\nExperience in performance modeling, performance analysis, workload characterization, or PPA optimization.\nExperience in C/C++ or other scripting languages.\n\nPreferred qualifications:\nPhD degree in Electrical Engineering, Computer Engineering, or Computer Science with a focus on computer architecture.\nExperience leading CPU microarchitectural exploration, defining specifications, and building high-fidelity C/C++ performance models.\nExperience with modern processor instruction set architectures (ISAs) such as ARM, RISC-V, or x86.\nExperience with system software stacks, including operating system kernels (Linux), device drivers, and runtime environments.\nExperience guiding technical strategy and mentoring engineers.\nAbility to communicate in English fluently to support client relationship management in this region.\nAbout the job\nBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.\n\nUS: $192000 - $278000 (USD) + 20% bonus target + equity + benefits\n\nLearn more about benefits at Google.\nResponsibilities\nDevelop innovative microarchitectural features to significantly enhance CPU performance.\nModel complex core microarchitectural concepts and evaluate Performance, Power, and Area (PPA) trade-offs to deliver a buildable, production-ready microarchitecture.\nDefine and document comprehensive CPU subsystem microarchitecture specifications.\nLead cross-functional collaboration with RTL, physical design, and verification teams to ensure a high-performance, power-efficient CPU implementation.\nDrive performance correlation between the performance model and RTL implementation and perform pre-silicon and post-silicon performance bug triage.\nGoogle is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.","company":"Google","rawCompany":"google","city":"Poughkeepsie","state":"NY","isRemote":false,"isActive":false,"createdAt":"2026-11-06T07:51:11.298Z","occupations":[{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2199.00","title":"Engineers, All Other","slug":"engineers-all-other"}],"industries":[{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"513210","title":"Software Publishers","slug":"software-publishers"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Lead CPU Performance Architect","description":"In most instances, this position requires in-person interviews as part of the hiring process.\nNote: By applying to this position you will have an opportunity to share your preferred working location from the following: Austin, TX, USA; Mountain View, CA, USA; Portland, OR, USA; Poughkeepsie, NY, USA.\nMinimum qualifications:\nBachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.\n10 years of experience with CPU microarchitecture design and performance modeling.\nExperience with software performance analysis and improvement, and high performance computer architectures (e.g., CPU, memory subsystem, multiprocessing).\nExperience in performance modeling, performance analysis, workload characterization, or PPA optimization.\nExperience in C/C++ or other scripting languages.\n\nPreferred qualifications:\nPhD degree in Electrical Engineering, Computer Engineering, or Computer Science with a focus on computer architecture.\nExperience leading CPU microarchitectural exploration, defining specifications, and building high-fidelity C/C++ performance models.\nExperience with modern processor instruction set architectures (ISAs) such as ARM, RISC-V, or x86.\nExperience with system software stacks, including operating system kernels (Linux), device drivers, and runtime environments.\nExperience guiding technical strategy and mentoring engineers.\nAbility to communicate in English fluently to support client relationship management in this region.\nAbout the job\nBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.\n\nUS: $192000 - $278000 (USD) + 20% bonus target + equity + benefits\n\nLearn more about benefits at Google.\nResponsibilities\nDevelop innovative microarchitectural features to significantly enhance CPU performance.\nModel complex core microarchitectural concepts and evaluate Performance, Power, and Area (PPA) trade-offs to deliver a buildable, production-ready microarchitecture.\nDefine and document comprehensive CPU subsystem microarchitecture specifications.\nLead cross-functional collaboration with RTL, physical design, and verification teams to ensure a high-performance, power-efficient CPU implementation.\nDrive performance correlation between the performance model and RTL implementation and perform pre-silicon and post-silicon performance bug triage.\nGoogle is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.","datePosted":"2026-11-06T07:51:11.298Z","dateModified":"2026-11-06T07:51:11.298Z","hiringOrganization":{"@type":"Organization","name":"Google","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Poughkeepsie","addressRegion":"NY","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"8ee645efe148dd75284e8cf3"},"url":"https://jobsearcher.com/jobs/8ee645efe148dd75284e8cf3"}}