{"schemaVersion":"jobsearcher.job.v1","id":"8eafe338acfc5fcbbd1de7c2","url":"https://jobsearcher.com/jobs/8eafe338acfc5fcbbd1de7c2","canonicalUrl":"https://jobsearcher.com/jobs/8eafe338acfc5fcbbd1de7c2","title":"SI/PI Characterization Engineer","description":"My client, an innovative AI hardware company, is looking for a SIPI Characterization Engineer to join its hardware team. The role will focus on electrical characterisation of high-speed SerDes interfaces and power delivery networks across advanced AI accelerator systems, working from early-stage design through to production.\n\nKey Responsibilities\n\nCharacterise high-speed SerDes interfaces including PCIe, Ethernet, and custom protocols\n\nPerform BER testing, eye diagram analysis, PVT characterisation, and channel measurements\n\nOptimise SerDes Tx/Rx equalisation and analyse link performance\n\nCharacterise power delivery networks, transient noise, voltage droop, and PDN impedance\n\nDevelop scalable automated test frameworks for thousands of SerDes channels\n\nIntegrate oscilloscopes, BERTs, VNAs, and power analysers into automated test flows\n\nBuild data pipelines for test analysis, visualisation, and rapid troubleshooting\n\nWork closely with SIPI, PCB, package, and silicon design teams to influence future designs\n\nRequirements\n\n5–10 years' industry experience in hardware characterisation or SI/PI engineering\n\nBachelor's degree or higher in Electrical Engineering\n\nStrong understanding of SerDes architecture, equalisation, jitter, and link margin analysis\n\nExcellent knowledge of transmission line theory and high-speed signal integrity\n\nStrong understanding of PDN design, target impedance, resonance, and voltage regulator dynamics\n\nHands-on experience with electrical test and measurement equipment\n\nExperience developing test automation using Python preferred\n\nAI accelerator/GPU validation, PCIe compliance, SPC, or advanced PCB/package design experience\n\nWhat’s on Offer\n\n$120k–$600k base salary depending on experience, plus equity\n\nOnsite role in Mountain View, CA\n\nComprehensive health, dental, vision, and life insurance\n\n401(k) and/or Roth IRA with 5% company contribution\n\nPaid parental leave and flexible spending accounts\n\nOpportunity to work on cutting-edge AI accelerator and semiconductor technology\n\n#J-18808-Ljbffr","company":"Platform Recruitment","rawCompany":"platform recruitment","city":"Mountain View","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-09-04T03:39:12.342Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"541715","title":"Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)","slug":"research-and-development-in-the-physical-engineering-and-life-sciences-except-nanotechnology-and-biotechnology"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"SI/PI Characterization Engineer","description":"My client, an innovative AI hardware company, is looking for a SIPI Characterization Engineer to join its hardware team. The role will focus on electrical characterisation of high-speed SerDes interfaces and power delivery networks across advanced AI accelerator systems, working from early-stage design through to production.\n\nKey Responsibilities\n\nCharacterise high-speed SerDes interfaces including PCIe, Ethernet, and custom protocols\n\nPerform BER testing, eye diagram analysis, PVT characterisation, and channel measurements\n\nOptimise SerDes Tx/Rx equalisation and analyse link performance\n\nCharacterise power delivery networks, transient noise, voltage droop, and PDN impedance\n\nDevelop scalable automated test frameworks for thousands of SerDes channels\n\nIntegrate oscilloscopes, BERTs, VNAs, and power analysers into automated test flows\n\nBuild data pipelines for test analysis, visualisation, and rapid troubleshooting\n\nWork closely with SIPI, PCB, package, and silicon design teams to influence future designs\n\nRequirements\n\n5–10 years' industry experience in hardware characterisation or SI/PI engineering\n\nBachelor's degree or higher in Electrical Engineering\n\nStrong understanding of SerDes architecture, equalisation, jitter, and link margin analysis\n\nExcellent knowledge of transmission line theory and high-speed signal integrity\n\nStrong understanding of PDN design, target impedance, resonance, and voltage regulator dynamics\n\nHands-on experience with electrical test and measurement equipment\n\nExperience developing test automation using Python preferred\n\nAI accelerator/GPU validation, PCIe compliance, SPC, or advanced PCB/package design experience\n\nWhat’s on Offer\n\n$120k–$600k base salary depending on experience, plus equity\n\nOnsite role in Mountain View, CA\n\nComprehensive health, dental, vision, and life insurance\n\n401(k) and/or Roth IRA with 5% company contribution\n\nPaid parental leave and flexible spending accounts\n\nOpportunity to work on cutting-edge AI accelerator and semiconductor technology\n\n#J-18808-Ljbffr","datePosted":"2026-09-04T03:39:12.342Z","dateModified":"2026-09-04T03:39:12.342Z","hiringOrganization":{"@type":"Organization","name":"Platform Recruitment","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Mountain View","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"8eafe338acfc5fcbbd1de7c2"},"url":"https://jobsearcher.com/jobs/8eafe338acfc5fcbbd1de7c2"}}