{"schemaVersion":"jobsearcher.job.v1","id":"897dfd8cbd89e36e06fde975","url":"https://jobsearcher.com/jobs/897dfd8cbd89e36e06fde975","canonicalUrl":"https://jobsearcher.com/jobs/897dfd8cbd89e36e06fde975","title":"Senior Package Layout Engineer - Hardware, Senior Package Layout Engineer - Hardware","description":"Overview\nNVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions!\n\nThis position will collaborate with the Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues.\n\nResponsibilities\n\nAs part of a Layout team, you will collaborate to implement high speed/density ASIC packages.\n\nPerform substrate breakout patterns for ASIC packages.\n\nOptimize package pinout incorporating system level trade-offs of pins assignment.\n\nHelp perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite.\n\nPropose layout design trade-offs to the Technical Package Lead for resolution and implementation.\n\nConduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance.\n\nDevelop symbols and CAD library databases using Cadence APD design tools\n\nDevelop methodologies to improve layout productivity\n\nQualifications\n\nHold a B.S. Electrical Engineering or equivalent experience\n\n5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus\n\nProven experience in substrate layout of wire bond and flip chip packages, preferred\n\nSignificant background with Cadence APD or SiP and/or PCB layout tools (including Constraint Manager)\n\nSolid understanding of high-speed design signal integrity practices\n\nExperience with Virtuoso and Calibre is a plus\n\nExperience using Valor is helpful\n\nCompensation and Benefits\nYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 212,750 USD for Level 3, and 168,000 USD - 258,750 USD for Level 4. You will also be eligible for equity and benefits.\n\nApplications for this job will be accepted at least until February 10, 2026.\n\nThis posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.\n\nJR2012300\n\n#J-18808-Ljbffr","company":"NVIDIA","rawCompany":"nvidia","city":"Oregon","state":"WI","isRemote":false,"isActive":false,"createdAt":"2026-07-16T03:29:25.813Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2071.00","title":"Electrical Engineers","slug":"electrical-engineers"}],"industries":[{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Senior Package Layout Engineer - Hardware, Senior Package Layout Engineer - Hardware","description":"Overview\nNVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions!\n\nThis position will collaborate with the Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues.\n\nResponsibilities\n\nAs part of a Layout team, you will collaborate to implement high speed/density ASIC packages.\n\nPerform substrate breakout patterns for ASIC packages.\n\nOptimize package pinout incorporating system level trade-offs of pins assignment.\n\nHelp perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite.\n\nPropose layout design trade-offs to the Technical Package Lead for resolution and implementation.\n\nConduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance.\n\nDevelop symbols and CAD library databases using Cadence APD design tools\n\nDevelop methodologies to improve layout productivity\n\nQualifications\n\nHold a B.S. Electrical Engineering or equivalent experience\n\n5+ years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus\n\nProven experience in substrate layout of wire bond and flip chip packages, preferred\n\nSignificant background with Cadence APD or SiP and/or PCB layout tools (including Constraint Manager)\n\nSolid understanding of high-speed design signal integrity practices\n\nExperience with Virtuoso and Calibre is a plus\n\nExperience using Valor is helpful\n\nCompensation and Benefits\nYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 212,750 USD for Level 3, and 168,000 USD - 258,750 USD for Level 4. You will also be eligible for equity and benefits.\n\nApplications for this job will be accepted at least until February 10, 2026.\n\nThis posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.\n\nJR2012300\n\n#J-18808-Ljbffr","datePosted":"2026-07-16T03:29:25.813Z","dateModified":"2026-07-16T03:29:25.813Z","hiringOrganization":{"@type":"Organization","name":"NVIDIA","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Oregon","addressRegion":"WI","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"897dfd8cbd89e36e06fde975"},"url":"https://jobsearcher.com/jobs/897dfd8cbd89e36e06fde975"}}