{"schemaVersion":"jobsearcher.job.v1","id":"808ecbd4eace897427cab4cf","url":"https://jobsearcher.com/jobs/808ecbd4eace897427cab4cf","canonicalUrl":"https://jobsearcher.com/jobs/808ecbd4eace897427cab4cf","title":"Lead Verification Engineer - ASIC/FPGA & Advanced Methods","description":"Microchip Technology Inc. in Gresham, Oregon is seeking a Senior Verification Engineer to lead the development of comprehensive verification plans. The ideal candidate will have 5+ years of experience in ASIC/FPGA environments and proficiency in HDL languages such as SystemVerilog, Verilog, and VHDL. Responsibilities include managing regressions using Cadence tools and collaborating with design teams to ensure optimal device functionality. Competitive compensation includes a salary range of $70,304 - $205,000, along with comprehensive health benefits.\n#J-18808-Ljbffr","company":"Microchip Technology","rawCompany":"microchip technology","city":"Gresham","state":"OR","isRemote":false,"isActive":false,"createdAt":"2026-07-16T03:53:46.422Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2199.06","title":"Microsystems Engineers","slug":"microsystems-engineers"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"333242","title":"Semiconductor Machinery Manufacturing","slug":"semiconductor-machinery-manufacturing"},{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Lead Verification Engineer - ASIC/FPGA & Advanced Methods","description":"Microchip Technology Inc. in Gresham, Oregon is seeking a Senior Verification Engineer to lead the development of comprehensive verification plans. The ideal candidate will have 5+ years of experience in ASIC/FPGA environments and proficiency in HDL languages such as SystemVerilog, Verilog, and VHDL. Responsibilities include managing regressions using Cadence tools and collaborating with design teams to ensure optimal device functionality. Competitive compensation includes a salary range of $70,304 - $205,000, along with comprehensive health benefits.\n#J-18808-Ljbffr","datePosted":"2026-07-16T03:53:46.422Z","dateModified":"2026-07-16T03:53:46.422Z","hiringOrganization":{"@type":"Organization","name":"Microchip Technology","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Gresham","addressRegion":"OR","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"808ecbd4eace897427cab4cf"},"url":"https://jobsearcher.com/jobs/808ecbd4eace897427cab4cf"}}