{"schemaVersion":"jobsearcher.job.v1","id":"77db1bf9e9aa6b7b15ffc1f5","url":"https://jobsearcher.com/jobs/77db1bf9e9aa6b7b15ffc1f5","canonicalUrl":"https://jobsearcher.com/jobs/77db1bf9e9aa6b7b15ffc1f5","title":"Senior Data Cache & Coherent Interconnect Architect","description":"Qualcomm, located in Austin, Texas, is seeking engineers and architects for a new team focused on developing next-generation processors. Responsibilities include the architecture definition and implementation of data caches and interconnect subsystems. Candidates should have a strong background in processor architecture, hands-on experience with data caches, and proficiency in C/C++ or Verilog/SystemVerilog.\r\nThe position offers a competitive salary range of $154,000 to $252,800, bonus programs, RSU grants, and a comprehensive benefits package.\r\nJ-18808-Ljbffr","company":"Qualcomm","rawCompany":"qualcomm","city":"Austin","state":"TX","isRemote":false,"isActive":false,"createdAt":"2026-06-19T00:49:30.421Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"},{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Senior Data Cache & Coherent Interconnect Architect","description":"Qualcomm, located in Austin, Texas, is seeking engineers and architects for a new team focused on developing next-generation processors. Responsibilities include the architecture definition and implementation of data caches and interconnect subsystems. Candidates should have a strong background in processor architecture, hands-on experience with data caches, and proficiency in C/C++ or Verilog/SystemVerilog.\r\nThe position offers a competitive salary range of $154,000 to $252,800, bonus programs, RSU grants, and a comprehensive benefits package.\r\nJ-18808-Ljbffr","datePosted":"2026-06-19T00:49:30.421Z","dateModified":"2026-06-19T00:49:30.421Z","hiringOrganization":{"@type":"Organization","name":"Qualcomm","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Austin","addressRegion":"TX","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"77db1bf9e9aa6b7b15ffc1f5"},"url":"https://jobsearcher.com/jobs/77db1bf9e9aa6b7b15ffc1f5"}}