{"schemaVersion":"jobsearcher.job.v1","id":"73c97a0cd8adf85c3e851ef9","url":"https://jobsearcher.com/jobs/73c97a0cd8adf85c3e851ef9","canonicalUrl":"https://jobsearcher.com/jobs/73c97a0cd8adf85c3e851ef9","title":"Memory Layout Engineer - Lower-Node SRAM Expert","description":"leadIC Design Pvt Ltd is seeking a Memory Layout Engineer with 5–7 years of hands-on experience in memory layout design, mainly on lower technology nodes. The successful candidate will perform layout development, verification, and work closely with design and verification teams.\r\nThis role demands expertise in memory layout for SRAM/memory blocks and experience with DRC/LVS closure to ensure compliance with density requirements.#J-18808-Ljbffr","company":"Leadic Design","rawCompany":"leadic design","city":"Beaver","state":"OH","isRemote":false,"isActive":true,"createdAt":"2026-08-08T01:19:04.606Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2199.06","title":"Microsystems Engineers","slug":"microsystems-engineers"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Memory Layout Engineer - Lower-Node SRAM Expert","description":"leadIC Design Pvt Ltd is seeking a Memory Layout Engineer with 5–7 years of hands-on experience in memory layout design, mainly on lower technology nodes. The successful candidate will perform layout development, verification, and work closely with design and verification teams.\r\nThis role demands expertise in memory layout for SRAM/memory blocks and experience with DRC/LVS closure to ensure compliance with density requirements.#J-18808-Ljbffr","datePosted":"2026-08-08T01:19:04.606Z","dateModified":"2026-08-08T01:19:04.606Z","hiringOrganization":{"@type":"Organization","name":"Leadic Design","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Beaver","addressRegion":"OH","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"73c97a0cd8adf85c3e851ef9"},"url":"https://jobsearcher.com/jobs/73c97a0cd8adf85c3e851ef9"}}