{"schemaVersion":"jobsearcher.job.v1","id":"737ee9a9f8022be4492c2be6","url":"https://jobsearcher.com/jobs/737ee9a9f8022be4492c2be6","canonicalUrl":"https://jobsearcher.com/jobs/737ee9a9f8022be4492c2be6","title":"Package Layout Engineer","description":"Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.\n\nLightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!\n\nIf you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.\n\nLightmatter is (re)inventing the future of computing with light!\n\nAbout This Role\nLightmatter is looking for a Package Layout Design Engineer to drive the next generation products from concept to development. You will be part of the Signal Integrity, Power Integrity and Packaging team, tasked with delivering substrate layouts that support the package architecture from concept, through design optimization and completion, meeting stringent signal integrity, power integrity, and design for manufacturing requirements. This position offers a unique opportunity to work on new package architectures by solving complex interactions across digital, analog and photonics domains.\n\nResponsibilities\n\nDeliver IC package substrate layouts for standard and advanced packaging technologies.\n\nContribute to the product concept phase by delivering preliminary substrate designs and floorplanning to support overall stack-up (Silicon/package/MB) optimization.\n\nCollaborate with package substrate suppliers and Outsourced Semiconductor Assembly and Test (OSAT) companies to apply layout design rules, stack up, and implementation guidelines.\n\nGenerate fab files and coordinate with substrate suppliers and OSATs to support Design for Manufacturing (DFM) and Design for Assembly (DFA) closure.\n\nDesign package layouts while adhering to signal integrity, power integrity, thermal, and mechanical requirements.\n\nDesign packages incorporating analog and digital elements/interfaces.\n\nSupport signal/power integrity engineers by providing iterative test routes to refine design rules and routing topologies.\n\nCoordinate across functional teams to execute error‑free Package Design Tape Outs on schedule.\n\nSupport and adapt design automation and verification activities to improve team efficiency.\n\nQualifications\n\nB.S. or M.S. degree in Electrical Engineering or similar discipline with at least 5 years of relevant experience\n\nMinimum 3–5 years of experience in IC package layout design.\n\nProficient with Allegro X APD.\n\nUnderstanding of IC package substrates and organic materials, and their impact on package design.\n\nPreferred Qualifications\n\nEducational background in IC packaging and substrate layout design.\n\nFamiliarity with system‑level validation tools such as Cadence Integrity 3DIC for package/IC codesign.\n\nFamiliarity with layout tools (e.g., Expedition Package Designer, Pads Layout, Altium, etc.).\n\nExperience with layout tool scripting languages (e.g., SKILL or Python) to enable design automation.\n\nExposure to or interest in early‑stage architectural pathfinding and physical feasibility studies for multi‑chiplet and advanced packaging architectures (2.5D/3D IC, Silicon Interposers, EMIB, Fan‑Out Chip‑on‑Wafer, etc.).\n\nExperience evaluating floorplans, escape routing, bump patterns (micro‑bumps / hybrid bonding), and die‑to‑die (D2D) interface topologies.\n\nExcellent communication skills and the ability to collaborate effectively in cross‑functional teams.\n\nWe offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.\n\nSalary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance‑based equity, and other rewards that recognize your impact and contribution.\n\n$157,000 — $176,000 USD\n\nBenefits\n\nComprehensive Health Care Plan (Medical, Dental & Vision)\n\nRetirement Savings Matching Program\n\nLife Insurance (Basic, Voluntary & AD&D)\n\nGenerous Time Off (Vacation, Sick & Public Holidays)\n\nPaid Family Leave\n\nShort Term & Long Term Disability\n\nTraining & Development\n\nCommuter Benefits\n\nFlexible, hybrid workplace model\n\nEquity grants (applicable to full‑time employees)\n\nBenefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.\n\nExport Control\nCandidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.\n\n#J-18808-Ljbffr","company":"Socket","rawCompany":"socket","city":"Mountain View","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-09-02T03:34:01.909Z","occupations":[{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2071.00","title":"Electrical Engineers","slug":"electrical-engineers"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"},{"code":"541330","title":"Engineering Services","slug":"engineering-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Package Layout Engineer","description":"Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.\n\nLightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!\n\nIf you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.\n\nLightmatter is (re)inventing the future of computing with light!\n\nAbout This Role\nLightmatter is looking for a Package Layout Design Engineer to drive the next generation products from concept to development. You will be part of the Signal Integrity, Power Integrity and Packaging team, tasked with delivering substrate layouts that support the package architecture from concept, through design optimization and completion, meeting stringent signal integrity, power integrity, and design for manufacturing requirements. This position offers a unique opportunity to work on new package architectures by solving complex interactions across digital, analog and photonics domains.\n\nResponsibilities\n\nDeliver IC package substrate layouts for standard and advanced packaging technologies.\n\nContribute to the product concept phase by delivering preliminary substrate designs and floorplanning to support overall stack-up (Silicon/package/MB) optimization.\n\nCollaborate with package substrate suppliers and Outsourced Semiconductor Assembly and Test (OSAT) companies to apply layout design rules, stack up, and implementation guidelines.\n\nGenerate fab files and coordinate with substrate suppliers and OSATs to support Design for Manufacturing (DFM) and Design for Assembly (DFA) closure.\n\nDesign package layouts while adhering to signal integrity, power integrity, thermal, and mechanical requirements.\n\nDesign packages incorporating analog and digital elements/interfaces.\n\nSupport signal/power integrity engineers by providing iterative test routes to refine design rules and routing topologies.\n\nCoordinate across functional teams to execute error‑free Package Design Tape Outs on schedule.\n\nSupport and adapt design automation and verification activities to improve team efficiency.\n\nQualifications\n\nB.S. or M.S. degree in Electrical Engineering or similar discipline with at least 5 years of relevant experience\n\nMinimum 3–5 years of experience in IC package layout design.\n\nProficient with Allegro X APD.\n\nUnderstanding of IC package substrates and organic materials, and their impact on package design.\n\nPreferred Qualifications\n\nEducational background in IC packaging and substrate layout design.\n\nFamiliarity with system‑level validation tools such as Cadence Integrity 3DIC for package/IC codesign.\n\nFamiliarity with layout tools (e.g., Expedition Package Designer, Pads Layout, Altium, etc.).\n\nExperience with layout tool scripting languages (e.g., SKILL or Python) to enable design automation.\n\nExposure to or interest in early‑stage architectural pathfinding and physical feasibility studies for multi‑chiplet and advanced packaging architectures (2.5D/3D IC, Silicon Interposers, EMIB, Fan‑Out Chip‑on‑Wafer, etc.).\n\nExperience evaluating floorplans, escape routing, bump patterns (micro‑bumps / hybrid bonding), and die‑to‑die (D2D) interface topologies.\n\nExcellent communication skills and the ability to collaborate effectively in cross‑functional teams.\n\nWe offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.\n\nSalary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance‑based equity, and other rewards that recognize your impact and contribution.\n\n$157,000 — $176,000 USD\n\nBenefits\n\nComprehensive Health Care Plan (Medical, Dental & Vision)\n\nRetirement Savings Matching Program\n\nLife Insurance (Basic, Voluntary & AD&D)\n\nGenerous Time Off (Vacation, Sick & Public Holidays)\n\nPaid Family Leave\n\nShort Term & Long Term Disability\n\nTraining & Development\n\nCommuter Benefits\n\nFlexible, hybrid workplace model\n\nEquity grants (applicable to full‑time employees)\n\nBenefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.\n\nExport Control\nCandidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.\n\n#J-18808-Ljbffr","datePosted":"2026-09-02T03:34:01.909Z","dateModified":"2026-09-02T03:34:01.909Z","hiringOrganization":{"@type":"Organization","name":"Socket","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Mountain View","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"737ee9a9f8022be4492c2be6"},"url":"https://jobsearcher.com/jobs/737ee9a9f8022be4492c2be6"}}