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Digital Design / FPGA Engineering - Intern

AlteraSan Jose, CAJune 6th, 2026
Job DetailsJob Description:Altera is seeking a highly motivated Electrical Engineering intern to join the FPGA and digital systems engineering team. This role provides hands-on experience with RTL design, FPGA development, and SoC-level integration, contributing to cutting-edge programmable logic solutions.The ideal candidate has a strong foundation in digital system design, SystemVerilog, and hardware verification, with demonstrated experience through academic projects or engineering teams.Key ResponsibilitiesDesign and implement digital hardware using SystemVerilog RTL, including combinational and sequential logic components such as finite state machines (FSMs)Develop and verify hardware modules using custom testbenches and simulation tools, ensuring functional correctness across edge casesContribute to FPGA-based system development, including integration and validation of system-level blocksSupport design and implementation of dataflow architectures and arithmetic modules (e.g., matrix multipliers)Participate in the ASIC/SoC design flow, including RTL development, verification, and system integrationCollaborate with cross-functional engineering teams to debug, test, and improve hardware designsAssist in documentation, design reviews, and creation of block diagrams and technical reportsThe pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.$85K - $90K USDWe use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.QualificationsMinimum QualificationsCurrently pursuing a Bachelor’s Degree in Electrical Engineering or related fieldCoursework in Digital System Design, Computer Architecture, or Advanced ProgrammingPreferred QualificationsExperience with SystemVerilog (RTL) and digital logic design (combinational & sequential circuits)Familiarity with:FPGA design and simulation environmentsASIC design flow and verification methodologiesFinite state machines (FSMs) and module-level designProgramming experience in C, Python, or MATLABExposure to SoC design concepts and hardware/software integrationExperience with tools such as Git, KiCad/Altium, Arduino, or FPGA simulatorsHands-on experience with hardware prototyping, PCB design, or board-level testingWhat You’ll GainReal-world experience working on industry-grade FPGA and semiconductor designsExposure to the full hardware design lifecycle — from RTL to system integrationMentorship from experienced engineers in programmable logic and SoC developmentOpportunity to contribute to impactful projects in a collaborative engineering environmentBonus Experience (Nice To Have)Participation in engineering teams such as SoC/Chip Design groups or student semiconductor organizationsExperience developing testbenches with directed stimulus and edge-case validationTeaching or mentoring experience in digital design or RTL conceptsJob TypeStudent / Intern (Fixed Term)ShiftShift 1 (United States of America)Primary Location:San Jose, California, United StatesAdditional Locations:Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.