{"schemaVersion":"jobsearcher.job.v1","id":"6e187121c8a3545a1c667a2e","url":"https://jobsearcher.com/jobs/6e187121c8a3545a1c667a2e","canonicalUrl":"https://jobsearcher.com/jobs/6e187121c8a3545a1c667a2e","title":"RTL Design Engineer","description":"Job Description\nDigital Design Engineering/RTL Design Services.\n\nArchitecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”), sub-IPs, modules, and library components.\n\nDigital design using System Verilog and/or Verilog RTL, RTL generators (in Python), and/or high-level synthesis (“HLS”).\n\nRTL integration of SoC subsystems, IPs, sub-IPs, modules, and library components; SoC-level integration.\n\nSupport mapping of RTL on Zebu and HAPS for IP bring up and E2E validation.\n\nDesign for low power and power intent using Unified Power Format (“UPF”).\n\nConstraint development, synthesis, timing closure, and optimization of the design.\n\nCode quality checks, including Linting, Clock Domain Crossing, Reset Domain Crossing.\n\nDebug and bug fixes.\n\nMandatory Skills\nVLSI Physical Place and Route.\n\nExperience\n8–10 Years.\n\nCompensation\nExpected compensation ranges from $100,000 to $180,000. Compensation will depend on location, wages, skills, and experience.\n\nBenefits\nEligible for Wipro's standard benefits, including medical and dental options, disability insurance, paid time off (including sick leave), other paid and unpaid leave options.\n\nEEO Statement\nWipro provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws. Applications from veterans and people with disabilities are explicitly welcome.\n\n#J-18808-Ljbffr","company":"Wipro","rawCompany":"wipro","city":"Mountain View","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-06-20T03:55:39.924Z","occupations":[{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2199.00","title":"Engineers, All Other","slug":"engineers-all-other"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"},{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"RTL Design Engineer","description":"Job Description\nDigital Design Engineering/RTL Design Services.\n\nArchitecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”), sub-IPs, modules, and library components.\n\nDigital design using System Verilog and/or Verilog RTL, RTL generators (in Python), and/or high-level synthesis (“HLS”).\n\nRTL integration of SoC subsystems, IPs, sub-IPs, modules, and library components; SoC-level integration.\n\nSupport mapping of RTL on Zebu and HAPS for IP bring up and E2E validation.\n\nDesign for low power and power intent using Unified Power Format (“UPF”).\n\nConstraint development, synthesis, timing closure, and optimization of the design.\n\nCode quality checks, including Linting, Clock Domain Crossing, Reset Domain Crossing.\n\nDebug and bug fixes.\n\nMandatory Skills\nVLSI Physical Place and Route.\n\nExperience\n8–10 Years.\n\nCompensation\nExpected compensation ranges from $100,000 to $180,000. Compensation will depend on location, wages, skills, and experience.\n\nBenefits\nEligible for Wipro's standard benefits, including medical and dental options, disability insurance, paid time off (including sick leave), other paid and unpaid leave options.\n\nEEO Statement\nWipro provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws. Applications from veterans and people with disabilities are explicitly welcome.\n\n#J-18808-Ljbffr","datePosted":"2026-06-20T03:55:39.924Z","dateModified":"2026-06-20T03:55:39.924Z","hiringOrganization":{"@type":"Organization","name":"Wipro","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Mountain View","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"6e187121c8a3545a1c667a2e"},"url":"https://jobsearcher.com/jobs/6e187121c8a3545a1c667a2e"}}