Hardware Design Principal Engineer (Santa Clara)

Hardware Design Principal Engineer (Signal Integrity), Santa Clara, California, USA, Permanent RoleCompensation Range: $225K–$275K USDJoin a leading semiconductor technology company designing next-generation PCIe Gen5/Gen6 validation and reference boards.Key Expertise:• Signal Integrity (SI)• PCIe Gen4/Gen5/Gen6• PAM-4 & 25 Gbps SERDES• Cadence Sigrity, HFSS, ADS, HyperLynx• High-Speed PCB Design• Board Bring-Up & ValidationRequirements:• BS + 5–10 years or MS/PhD + 3–5 years• Lead Signal Integrity Engineering experience• Strong high-speed design and EM fundamentalsVacancy StatusThis is an active position currently open for hiring.Use of Artificial IntelligenceNo artificial intelligence (AI) is used in the screening or selection process. All applications are reviewed by our recruitment team.Equal OpportunityemergiTEL is committed to creating a diverse and inclusive workplace. We welcome applications from all qualified individuals regardless of background. Hiring decisions are based solely on skills, experience, and qualifications relevant to the role.Apply Today