{"schemaVersion":"jobsearcher.job.v1","id":"62f697d61aa05ff05ebf7ec8","url":"https://jobsearcher.com/jobs/62f697d61aa05ff05ebf7ec8","canonicalUrl":"https://jobsearcher.com/jobs/62f697d61aa05ff05ebf7ec8","title":"PCB Layout Engineer","description":"Job Description:\nKey Responsibilities\nOwn end-to-end PCB layout for complex, high-density designs used in data center server boards\nPerform high-speed digital layout for interfaces like HBM,DDR4/5, PCIe Gen 5/6, USB 3.2 or higher, with attention to controlled impedance, length matching, and crosstalk mitigation\nDevelop and enforce layout design rules for High-speed digital, analog, mixed-signal, and power domains within tightly constrained wearable form factors\nCollaborate with electrical engineers to review schematics and provide layout-driven feedback on component placement, power distribution network design, and signal routing strategies\nPartner with mechanical engineers to resolve physical constraints including board outline, connector placement, thermal management, and stack-up definition\nDrive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure layouts meet yield and reliability targets\nMaintain and improve PCB design standards, layer stack-up libraries, and footprint libraries to support scalable development across multiple hardware programs\nSupport by providing layout documentation, net tracing support, and design revision analysis for prototype and production boards\nSkill Requirements\nAdvanced Proficiency in Allegro PCB For PCB Layout and Design.\nStrong Knowledge of Cad Software For 2D And 3D Design Applications.10-14 years of CAD experience, Cadence Allegro Layout tool 23.1 and above experience is mandatory\nHands on experience in HDI micro via( Blind/Buried) technology\nIntel or high complex SoC/Microprocessor/FPGA based PCB design experience preferred\nhigh complex SoC/Microprocessor/FPGA based PCB design experience preferred\nAbility to deliver PCB CAD layout of High-Density, High-Speed memory designs (DDR5/LPDDR5), PCIe Gen 5 or Gen 6, Power Delivery, Mixed Analog/Digital\nDeep knowledge of CES (Constraint Editor) and high -speed constraint driven designs, DFA/DFM/DFT knowledge to adhere to Quality PCB fabrication and assembly assurance\nStrong Communication and Presentation Abilities To Effectively Convey Design Concepts.\nPay: $50.00 - $80.00 per hour\nExperience:\nPCB Layout: 8 years (Required)\nCadence Allegro: 8 years (Required)\nFPGA Based PCB design: 8 years (Required)\nWork Location: In person","company":"Excelon Solutions","rawCompany":"excelon solutions","city":"Menlo Park","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-08-07T09:08:05.239Z","occupations":[{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-3012.00","title":"Electrical and Electronics Drafters","slug":"electrical-and-electronics-drafters"}],"industries":[{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"334412","title":"Bare Printed Circuit Board Manufacturing","slug":"bare-printed-circuit-board-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"PCB Layout Engineer","description":"Job Description:\nKey Responsibilities\nOwn end-to-end PCB layout for complex, high-density designs used in data center server boards\nPerform high-speed digital layout for interfaces like HBM,DDR4/5, PCIe Gen 5/6, USB 3.2 or higher, with attention to controlled impedance, length matching, and crosstalk mitigation\nDevelop and enforce layout design rules for High-speed digital, analog, mixed-signal, and power domains within tightly constrained wearable form factors\nCollaborate with electrical engineers to review schematics and provide layout-driven feedback on component placement, power distribution network design, and signal routing strategies\nPartner with mechanical engineers to resolve physical constraints including board outline, connector placement, thermal management, and stack-up definition\nDrive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure layouts meet yield and reliability targets\nMaintain and improve PCB design standards, layer stack-up libraries, and footprint libraries to support scalable development across multiple hardware programs\nSupport by providing layout documentation, net tracing support, and design revision analysis for prototype and production boards\nSkill Requirements\nAdvanced Proficiency in Allegro PCB For PCB Layout and Design.\nStrong Knowledge of Cad Software For 2D And 3D Design Applications.10-14 years of CAD experience, Cadence Allegro Layout tool 23.1 and above experience is mandatory\nHands on experience in HDI micro via( Blind/Buried) technology\nIntel or high complex SoC/Microprocessor/FPGA based PCB design experience preferred\nhigh complex SoC/Microprocessor/FPGA based PCB design experience preferred\nAbility to deliver PCB CAD layout of High-Density, High-Speed memory designs (DDR5/LPDDR5), PCIe Gen 5 or Gen 6, Power Delivery, Mixed Analog/Digital\nDeep knowledge of CES (Constraint Editor) and high -speed constraint driven designs, DFA/DFM/DFT knowledge to adhere to Quality PCB fabrication and assembly assurance\nStrong Communication and Presentation Abilities To Effectively Convey Design Concepts.\nPay: $50.00 - $80.00 per hour\nExperience:\nPCB Layout: 8 years (Required)\nCadence Allegro: 8 years (Required)\nFPGA Based PCB design: 8 years (Required)\nWork Location: In person","datePosted":"2026-08-07T09:08:05.239Z","dateModified":"2026-08-07T09:08:05.239Z","hiringOrganization":{"@type":"Organization","name":"Excelon Solutions","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Menlo Park","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"62f697d61aa05ff05ebf7ec8"},"url":"https://jobsearcher.com/jobs/62f697d61aa05ff05ebf7ec8"}}