{"schemaVersion":"jobsearcher.job.v1","id":"5596f78cbba7598fead99944","url":"https://jobsearcher.com/jobs/5596f78cbba7598fead99944","canonicalUrl":"https://jobsearcher.com/jobs/5596f78cbba7598fead99944","title":"CPU Implementation Feasibility Engineer","description":"Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring your passion and dedication, and there's no telling what you could accomplish. Here, dynamic people and innovative technologies are the norm — the engineers on our teams have reinvented entire industries through Apple hardware. That same drive for innovation extends to how we work, and to our commitment to leave the world better than we found it. Apple's Silicon Engineering Group (SEG) is looking for talented engineers to join our CPU implementation feasibility team. You'll help shape the next generation of Apple silicon from the earliest stages, working with RTL on turning ambitious microarchitectural ideas into buildable, high-performance, low-power designs.\n\nDescription\nResponsibilities also include but are not limited to:\n\nPerforming different feasibility experiments for RTL innovations and improvements that drive the next generation high performance and low power chips\n\nMaking area, frequency, performance and power trade-offs\n\nDriving RTL-to-GDS flow through synthesis/place-and-route with ambitious goals for power, performance, and area\n\nWorking with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, power, testability, and reliability\n\nPerforming different floor planning experiments to understand the microarchitectural feasibility for achieving high targets for performance, power and area\n\nMinimum Qualifications\n\nMinimum BS and 3+ years of relevant industry experience\n\nExperience with VLSI implementation on high performance designs\n\nExperience with CPU microarchitecture\n\nPreferred Qualifications\n\nUnderstanding of static timing analysis and power\n\nPhysical Design Fundamentals\n\nImplementation experience on high performance CPU designs\n\nExperience with Logical Equivalence checking (LEC) tools\n\nExperience with Power analysis tools\n\nExperience with Static Timing Analysis Tools\n\nUnderstanding of power, performance and area tradeoffs\n\nStrong communication\n\n#J-18808-Ljbffr","company":"Socket","rawCompany":"socket","city":"Austin","state":"TX","isRemote":false,"isActive":false,"createdAt":"2026-09-02T03:53:26.842Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"},{"code":"17-2199.00","title":"Engineers, All Other","slug":"engineers-all-other"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"541715","title":"Research and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)","slug":"research-and-development-in-the-physical-engineering-and-life-sciences-except-nanotechnology-and-biotechnology"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"CPU Implementation Feasibility Engineer","description":"Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring your passion and dedication, and there's no telling what you could accomplish. Here, dynamic people and innovative technologies are the norm — the engineers on our teams have reinvented entire industries through Apple hardware. That same drive for innovation extends to how we work, and to our commitment to leave the world better than we found it. Apple's Silicon Engineering Group (SEG) is looking for talented engineers to join our CPU implementation feasibility team. You'll help shape the next generation of Apple silicon from the earliest stages, working with RTL on turning ambitious microarchitectural ideas into buildable, high-performance, low-power designs.\n\nDescription\nResponsibilities also include but are not limited to:\n\nPerforming different feasibility experiments for RTL innovations and improvements that drive the next generation high performance and low power chips\n\nMaking area, frequency, performance and power trade-offs\n\nDriving RTL-to-GDS flow through synthesis/place-and-route with ambitious goals for power, performance, and area\n\nWorking with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, power, testability, and reliability\n\nPerforming different floor planning experiments to understand the microarchitectural feasibility for achieving high targets for performance, power and area\n\nMinimum Qualifications\n\nMinimum BS and 3+ years of relevant industry experience\n\nExperience with VLSI implementation on high performance designs\n\nExperience with CPU microarchitecture\n\nPreferred Qualifications\n\nUnderstanding of static timing analysis and power\n\nPhysical Design Fundamentals\n\nImplementation experience on high performance CPU designs\n\nExperience with Logical Equivalence checking (LEC) tools\n\nExperience with Power analysis tools\n\nExperience with Static Timing Analysis Tools\n\nUnderstanding of power, performance and area tradeoffs\n\nStrong communication\n\n#J-18808-Ljbffr","datePosted":"2026-09-02T03:53:26.842Z","dateModified":"2026-09-02T03:53:26.842Z","hiringOrganization":{"@type":"Organization","name":"Socket","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Austin","addressRegion":"TX","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"5596f78cbba7598fead99944"},"url":"https://jobsearcher.com/jobs/5596f78cbba7598fead99944"}}