{"schemaVersion":"jobsearcher.job.v1","id":"49feb7dfc755d068deb30407","url":"https://jobsearcher.com/jobs/49feb7dfc755d068deb30407","canonicalUrl":"https://jobsearcher.com/jobs/49feb7dfc755d068deb30407","title":"Principal Layout Design Engineer","description":"Description\n\nInvent the future with us.\n\nAmpere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute.\n\nAs a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications.\n\nJoin us at Ampere and work alongside a passionate and growing team - we’d love to have you apply!\n\nAbout the role:\n\nAs a key member of the layout team, you will be responsible for delivering clean layouts that meet LVS, DRC, ERC, EM, and IR requirements.\nYour role will involve close collaboration with various teams to ensure seamless full-chip integration and high-quality design implementation.\n\nWhat you’ll achieve:\n\nCollaborate with the Place & Route (P&R) team to resolve full-chip integration issues.\nDevelop and improve methodologies to simplify custom macro integration into the P&R flow.\nFloorplan and build out cells, blocks, and macros efficiently.\nUnderstand, create, and debug LEF files to support design processes.\nDesign complex layouts for both analog and digital circuits using deep submicron technologies.\nAnalyze and interpret LVS, DRC, ERC, EM, and IR results to identify and resolve issues.\nIdentify schematic or layout problems and work closely with engineering teams to address them.\nAbility to work on multiple projects across different technologies simultaneously.\nLearn and effectively utilize Ampere’s in-house design tools.\nCoordinate with circuit engineers located in different regions and time zones.\nSupport and assist during tapeout phases to ensure successful project completion.\nContribute ideas as an integral part of a small, collaborative team.\nCoach and train junior engineers to foster skill development within the team.\n\nAbout you:\n\nMinimum of 8 years’ experience in custom layout design.\nCurrent hands-on experience with 3nm technology is essential.\nHigh proficiency in laying out custom digital components such as SRAM, register files, and standard cells.\nStrong skills in designing custom analog blocks including amplifiers and resistor ladders.\nExpertise in laying out and balancing custom clock H-trees for full-chip designs.\nExperience with full-chip integration of custom IP alongside P&R teams.\nSolid knowledge of Design for Manufacturability (DFM), hierarchical layout techniques, device matching, and low-parasitic layout practices.\nGood understanding of Electromigration (EM) and IR drop analysis.\nProficient with Cadence XL/GXL/EXL and Mentor Graphics Calibre tools.\nFamiliarity with Cadence Innovus is a plus.\nExperience with Totem tools for EM/IR analysis is advantageous.\nProgramming skills are a plus but not required.\nExcellent communication skills with the ability to collaborate effectively across multiple locations and time zones.\nBachelor's degree & 8 years of related experience; or master’s degree & 6 years; or PhD & 3 years\n\nWhat we’ll offer:\n\nAt Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits.\n\nThe full base pay range for this role is between $182,000 and $273,000, except in the San Francisco Bay Area where the range is between $195,000 and $292,000.\nOur benefits include health, wellness, and financial programs that support employees through every stage of life.\n\nBenefit highlights include:\n\nPremium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future.\nUnlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance.\nA variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day.\n\nAnd there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process.\n\n#LI-TC\n#LI-Hybrid\n\nAmpere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.","company":"Ampere Computing","rawCompany":"ampere computing","city":"Santa Clara","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-06-05T00:17:04.181Z","occupations":[{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2199.00","title":"Engineers, All Other","slug":"engineers-all-other"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Principal Layout Design Engineer","description":"Description\n\nInvent the future with us.\n\nAmpere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute.\n\nAs a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications.\n\nJoin us at Ampere and work alongside a passionate and growing team - we’d love to have you apply!\n\nAbout the role:\n\nAs a key member of the layout team, you will be responsible for delivering clean layouts that meet LVS, DRC, ERC, EM, and IR requirements.\nYour role will involve close collaboration with various teams to ensure seamless full-chip integration and high-quality design implementation.\n\nWhat you’ll achieve:\n\nCollaborate with the Place & Route (P&R) team to resolve full-chip integration issues.\nDevelop and improve methodologies to simplify custom macro integration into the P&R flow.\nFloorplan and build out cells, blocks, and macros efficiently.\nUnderstand, create, and debug LEF files to support design processes.\nDesign complex layouts for both analog and digital circuits using deep submicron technologies.\nAnalyze and interpret LVS, DRC, ERC, EM, and IR results to identify and resolve issues.\nIdentify schematic or layout problems and work closely with engineering teams to address them.\nAbility to work on multiple projects across different technologies simultaneously.\nLearn and effectively utilize Ampere’s in-house design tools.\nCoordinate with circuit engineers located in different regions and time zones.\nSupport and assist during tapeout phases to ensure successful project completion.\nContribute ideas as an integral part of a small, collaborative team.\nCoach and train junior engineers to foster skill development within the team.\n\nAbout you:\n\nMinimum of 8 years’ experience in custom layout design.\nCurrent hands-on experience with 3nm technology is essential.\nHigh proficiency in laying out custom digital components such as SRAM, register files, and standard cells.\nStrong skills in designing custom analog blocks including amplifiers and resistor ladders.\nExpertise in laying out and balancing custom clock H-trees for full-chip designs.\nExperience with full-chip integration of custom IP alongside P&R teams.\nSolid knowledge of Design for Manufacturability (DFM), hierarchical layout techniques, device matching, and low-parasitic layout practices.\nGood understanding of Electromigration (EM) and IR drop analysis.\nProficient with Cadence XL/GXL/EXL and Mentor Graphics Calibre tools.\nFamiliarity with Cadence Innovus is a plus.\nExperience with Totem tools for EM/IR analysis is advantageous.\nProgramming skills are a plus but not required.\nExcellent communication skills with the ability to collaborate effectively across multiple locations and time zones.\nBachelor's degree & 8 years of related experience; or master’s degree & 6 years; or PhD & 3 years\n\nWhat we’ll offer:\n\nAt Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits.\n\nThe full base pay range for this role is between $182,000 and $273,000, except in the San Francisco Bay Area where the range is between $195,000 and $292,000.\nOur benefits include health, wellness, and financial programs that support employees through every stage of life.\n\nBenefit highlights include:\n\nPremium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future.\nUnlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance.\nA variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day.\n\nAnd there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process.\n\n#LI-TC\n#LI-Hybrid\n\nAmpere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law.","datePosted":"2026-06-05T00:17:04.181Z","dateModified":"2026-06-05T00:17:04.181Z","hiringOrganization":{"@type":"Organization","name":"Ampere Computing","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Santa Clara","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"49feb7dfc755d068deb30407"},"url":"https://jobsearcher.com/jobs/49feb7dfc755d068deb30407"}}