{"schemaVersion":"jobsearcher.job.v1","id":"460288bc2afa2f0cb876334c","url":"https://jobsearcher.com/jobs/460288bc2afa2f0cb876334c","canonicalUrl":"https://jobsearcher.com/jobs/460288bc2afa2f0cb876334c","title":"GPU Design Verification Engineer","description":"OverviewAs a GPU Design Verification Engineer at AMD, you verify Graphics Core IP by collaborating with architects, RTL, firmware, and software teams to ensure functional and performance closure. You will shape verification strategies, build reusable UVM environments, and develop constrained-random and scenario-based tests. You'll drive verification closure and support AI-driven workflows to boost productivity. This role places you at the core of GPU design, with impact across cutting-edge graphics and AI-enabled technologies.ResponsibilitiesCollaborate with architects, RTL, firmware, software, and validation teams to capture feature requirements and verification goalsDefine verification strategies, methodologies, and coverage plans for complex featuresDevelop comprehensive verification plans considering interactions, system use cases, and dependenciesArchitect and enhance reusable UVM environments, scoreboards, checkers, generators, and coverage modelsDevelop constrained-random, directed, and scenario-based test suitesDrive verification closure and signoff criteria across functional, code, assertions, and performance coverageDebug test failures and coordinate with RTL and firmware to resolve defectsDevelop and deploy AI-driven verification workflows to improve productivity and automationKey requirementsIP level ASIC verification proficiencyUVM testbenches development in Linux/WindowsVerilog, SystemVerilog, C/C++AI-assisted automation tools experience a plusConstrained random verification, functional coverage, and assertionsRTL debugging with simulation toolsPerl/Python/Ruby/Makefile/shell scriptingLeadership or mentorship experience is an assetFormal Verification familiarity is an assetBachelor or Master in related field preferredteam player with strong communicationcross-site/timezone collaborationstrong analytical and problem-solving abilitiesVerilogSystemVerilogUVM","company":"AMD","rawCompany":"amd","city":"Chicago","state":"IL","isRemote":false,"isActive":false,"createdAt":"2026-10-26T13:44:05.427Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2112.02","title":"Validation Engineers","slug":"validation-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"}],"industries":[{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"},{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"GPU Design Verification Engineer","description":"OverviewAs a GPU Design Verification Engineer at AMD, you verify Graphics Core IP by collaborating with architects, RTL, firmware, and software teams to ensure functional and performance closure. You will shape verification strategies, build reusable UVM environments, and develop constrained-random and scenario-based tests. You'll drive verification closure and support AI-driven workflows to boost productivity. This role places you at the core of GPU design, with impact across cutting-edge graphics and AI-enabled technologies.ResponsibilitiesCollaborate with architects, RTL, firmware, software, and validation teams to capture feature requirements and verification goalsDefine verification strategies, methodologies, and coverage plans for complex featuresDevelop comprehensive verification plans considering interactions, system use cases, and dependenciesArchitect and enhance reusable UVM environments, scoreboards, checkers, generators, and coverage modelsDevelop constrained-random, directed, and scenario-based test suitesDrive verification closure and signoff criteria across functional, code, assertions, and performance coverageDebug test failures and coordinate with RTL and firmware to resolve defectsDevelop and deploy AI-driven verification workflows to improve productivity and automationKey requirementsIP level ASIC verification proficiencyUVM testbenches development in Linux/WindowsVerilog, SystemVerilog, C/C++AI-assisted automation tools experience a plusConstrained random verification, functional coverage, and assertionsRTL debugging with simulation toolsPerl/Python/Ruby/Makefile/shell scriptingLeadership or mentorship experience is an assetFormal Verification familiarity is an assetBachelor or Master in related field preferredteam player with strong communicationcross-site/timezone collaborationstrong analytical and problem-solving abilitiesVerilogSystemVerilogUVM","datePosted":"2026-10-26T13:44:05.427Z","dateModified":"2026-10-26T13:44:05.427Z","hiringOrganization":{"@type":"Organization","name":"AMD","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Chicago","addressRegion":"IL","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"460288bc2afa2f0cb876334c"},"url":"https://jobsearcher.com/jobs/460288bc2afa2f0cb876334c"}}