{"schemaVersion":"jobsearcher.job.v1","id":"2df2d6fd3db64c857f0478c0","url":"https://jobsearcher.com/jobs/2df2d6fd3db64c857f0478c0","canonicalUrl":"https://jobsearcher.com/jobs/2df2d6fd3db64c857f0478c0","title":"Senior IC Packaging Development Engineer","description":"We are looking for an experienced Engineerwho will lead the development of rapid IC packaging of individual die, to enable Failure Analysis and NPI tasks ahead of high-volume manufacturing. This will include planning &drivingrelated R&D with multiple internal and external partners and you will be responsible for establishing advanced packaging processes needed to meet our NPI goals regarding packaging turn‑around‑time, reliability, and chip-package interaction. Prior knowledge of Package related Failure Analysis is beneficial.\n\nWhat you will be doing:\n\nPackage Development & Prototyping: Drive the process, mechanical, thermal, and material evaluation of the latest IC packages. Manage rapid prototyping builds, package stack-ups, and assembly processes to bring new packaging architectures from concept to small volume for FA and NPI use cases.\n\nMaterial Characterization: Pioneer new packaging & die-level processing methodologies and evaluate innovative packaging materials (e.g., molding compounds, substrates, adhesives).\n\nFailure Analysis & Debug: Coordinate comprehensive physical and electrical failure analysis on prototype builds, reliability‑tested components to determine root causes of failures.\n\nMulti-functional Collaboration: You’ll be embedded into the IC Failure Analysis team and collaborate with IC & Package design teams, process & product engineering. Collaborate with foundries and OSAT (Outsourced Semiconductor Assembly and Test) partners to develop & test the required processes, tooling, and workflows.\n\nWhat we need to see:\n\nB.S., M.S., or Ph.D., or equivalent experience in Materials Science, Mechanical Engineering, Electrical Engineering, Physics, or a related semiconductor field.\n\nPackaging Expertise: Deep understanding of flip‑chip, 2.5D/3D packaging, wire bonding, and advanced substrate architectures.\n\nExperience: 12+ years of hands‑on experience in IC packaging development and/or package design, NPI (New Product Introduction).\n\nDesign & Simulation Tools: Familiarity with IC package EDA software (e.g., Cadence Allegro Package Designer) and Finite Element Modeling (FEM) tools like ANSYS or ABAQUS is a strong plus.\n\nFA Tooling Proficiency: At a minimum, you’ll need basic understanding of advanced packaging related FA techniques and equipment, such as SEM, EDX, CSAM, X‑Ray, and LIT.\n\nWith competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers; we have some of the most forward‑thinking and hardworking people in the world working for us and, due to unparalleled growth, best‑in‑class teams are rapidly growing. If you’re creative and autonomous with a real passion for your work, we want to hear from you!\n\nYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD – 270,250 USD for Level 5, and 216,000 USD – 345,000 USD for Level 6.\n\nYou will also be eligible for equity and benefits.\n\nApplications for this job will be accepted at least until July 19, 2026.\n\nThis posting is for an existing vacancy.\n\nNVIDIA uses AI tools in its recruiting processes.\n\nNVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.\n\n#J-18808-Ljbffr","company":"NVIDIA","rawCompany":"nvidia","city":"Santa Clara","state":"CA","isRemote":false,"isActive":true,"createdAt":"2026-07-19T03:26:31.623Z","occupations":[{"code":"17-2199.00","title":"Engineers, All Other","slug":"engineers-all-other"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"333242","title":"Semiconductor Machinery Manufacturing","slug":"semiconductor-machinery-manufacturing"},{"code":"334419","title":"Other Electronic Component Manufacturing","slug":"other-electronic-component-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Senior IC Packaging Development Engineer","description":"We are looking for an experienced Engineerwho will lead the development of rapid IC packaging of individual die, to enable Failure Analysis and NPI tasks ahead of high-volume manufacturing. This will include planning &drivingrelated R&D with multiple internal and external partners and you will be responsible for establishing advanced packaging processes needed to meet our NPI goals regarding packaging turn‑around‑time, reliability, and chip-package interaction. Prior knowledge of Package related Failure Analysis is beneficial.\n\nWhat you will be doing:\n\nPackage Development & Prototyping: Drive the process, mechanical, thermal, and material evaluation of the latest IC packages. Manage rapid prototyping builds, package stack-ups, and assembly processes to bring new packaging architectures from concept to small volume for FA and NPI use cases.\n\nMaterial Characterization: Pioneer new packaging & die-level processing methodologies and evaluate innovative packaging materials (e.g., molding compounds, substrates, adhesives).\n\nFailure Analysis & Debug: Coordinate comprehensive physical and electrical failure analysis on prototype builds, reliability‑tested components to determine root causes of failures.\n\nMulti-functional Collaboration: You’ll be embedded into the IC Failure Analysis team and collaborate with IC & Package design teams, process & product engineering. Collaborate with foundries and OSAT (Outsourced Semiconductor Assembly and Test) partners to develop & test the required processes, tooling, and workflows.\n\nWhat we need to see:\n\nB.S., M.S., or Ph.D., or equivalent experience in Materials Science, Mechanical Engineering, Electrical Engineering, Physics, or a related semiconductor field.\n\nPackaging Expertise: Deep understanding of flip‑chip, 2.5D/3D packaging, wire bonding, and advanced substrate architectures.\n\nExperience: 12+ years of hands‑on experience in IC packaging development and/or package design, NPI (New Product Introduction).\n\nDesign & Simulation Tools: Familiarity with IC package EDA software (e.g., Cadence Allegro Package Designer) and Finite Element Modeling (FEM) tools like ANSYS or ABAQUS is a strong plus.\n\nFA Tooling Proficiency: At a minimum, you’ll need basic understanding of advanced packaging related FA techniques and equipment, such as SEM, EDX, CSAM, X‑Ray, and LIT.\n\nWith competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers; we have some of the most forward‑thinking and hardworking people in the world working for us and, due to unparalleled growth, best‑in‑class teams are rapidly growing. If you’re creative and autonomous with a real passion for your work, we want to hear from you!\n\nYour base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD – 270,250 USD for Level 5, and 216,000 USD – 345,000 USD for Level 6.\n\nYou will also be eligible for equity and benefits.\n\nApplications for this job will be accepted at least until July 19, 2026.\n\nThis posting is for an existing vacancy.\n\nNVIDIA uses AI tools in its recruiting processes.\n\nNVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.\n\n#J-18808-Ljbffr","datePosted":"2026-07-19T03:26:31.623Z","dateModified":"2026-07-19T03:26:31.623Z","hiringOrganization":{"@type":"Organization","name":"NVIDIA","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Santa Clara","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"2df2d6fd3db64c857f0478c0"},"url":"https://jobsearcher.com/jobs/2df2d6fd3db64c857f0478c0"}}