Physical Design Engineer

Build the Silicon That Shapes What's Next We are partnering with an advanced semiconductor innovation team focused on next-generation high-speed interconnect technologies, AI infrastructure, and future compute architectures. They are seeking a senior-level Staff Physical Design Engineer to take full ownership of the physical implementation of a cutting-edge mixed-signal PHY test chip from synthesized netlist through GDSII tape-out. This is not a support role or a traditional staff augmentation engagement. This is an opportunity for an experienced engineer to own a technically challenging implementation effort within a lean, elite engineering environment where your expertise directly influences silicon success. The project centers on a 36 I/O full-duplex die-to-die interconnect PHY characterization chip designed to validate novel signaling architectures and generate silicon data that will help shape future interconnect scaling strategies. You'll work side-by-side with highly respected analog designers, digital chip leadership, and an experienced layout specialist on a focused tape-out mission with clear goals and meaningful technical depth. Job Title: Physical Design Engineer Location:Minneapolis, MN Pay Range:$65 What You'll Be Doing You will own the complete back-end implementation flow for the test chip, including: Full-chip floorplanning and mixed-signal partitioningPower distribution and power integrity implementationPlace & route execution using Cadence InnovusStatic timing analysis and timing closure using Cadence TempusIR drop and electromigration analysisDRC/LVS/ERC sign-off using Mentor CalibreScan insertion and DFT coordinationTape-out preparation and foundry coordinationECO management and implementation optimizationDocumentation and knowledge transfer at project close This is a deeply technical environment involving: Analog/digital co-design challengesHigh-speed I/O implementationComplex macro integrationConstrained mixed-signal floorplanningFull-chip sign-off ownership What We're Looking For Required ExperienceBS, MS, or PhD in Electrical Engineering or related field8+ years of physical design experienceExperience leading at least one complete tape-out as primary or lead PD engineerStrong hands-on expertise with:Cadence InnovusCadence TempusMentor CalibreExperience with:MMMC timing closureOCV/AOCV analysisECO flowsHard macro integrationMixed-signal floorplanningStrong debugging and problem-solving skillsAbility to operate independently in a fast-moving environment Preferred ExperienceMixed-signal or analog-adjacent chip implementationHigh-speed interface or PHY design environmentsPower integrity tools such as Voltus or RedhawkUPF/CPF multi-voltage implementationFamiliarity with Synopsys ICC2Prior startup or contractor experience The Type of Engineer Who Thrives Here This role is ideal for someone who: Enjoys broad technical ownershipLikes solving difficult implementation problemsTakes initiative and drives closure independentlyCommunicates effectively across design disciplinesThrives in lean, highly collaborative teamsFinds tape-out execution energizing, not exhausting You'll have direct visibility into critical design decisions and the opportunity to make a meaningful technical impact without layers of process slowing things down. Why Engineers Are Interested in This OpportunityEnd-to-end ownership from floorplan to tape-outTechnically rich mixed-signal implementation workCollaboration with highly experienced silicon expertsLean team with fast decision-makingOpportunity to influence future interconnect technologiesClear project scope and defined deliverablesHigh-impact contract engagement with meaningful autonomy If you're a senior physical design engineer who enjoys owning implementation challenges from start to finish and wants to contribute to advanced silicon development in a high-accountability environment, we'd love to connect with you. Upon completion of waiting period, consultants are eligible for:Medical and Prescription Drug PlansDental PlanVision PlanHealth Savings AccountHealth Flexible Spending AccountDependent Care Flexible Spending AccountSupplemental Life InsuranceShort Term and Long Term Disability InsuranceBusiness Travel Insurance401(k), Plus MatchWeekly Pay About ManpowerGroup, Parent Company of: Manpower, Experis, Talent Solutions, and Jefferson Wells. ManpowerGroup (NYSE: MAN), the leading global workforce solutions company, helps organizations transform in a fast-changing world of work by sourcing, assessing, developing, and managing the talent that enables them to win. We develop innovative solutions for hundreds of thousands of organizations every year, providing them with skilled talent while finding meaningful, sustainable employment for millions of people across a wide range of industries and skills. Our expert family of brands - Manpower, Experis, Talent Solutions, and Jefferson Wells - creates substantial value for candidates and clients across more than 75 countries and territories and has done so for over 70 years. We are recognized consistently for our diversity - as a best place to work for Women, Inclusion, Equality and Disability and in 2023 ManpowerGroup was named one of the World's Most Ethical Companies for the 14th year - all confirming our position as the brand of choice for in-demand talent.