Multiple Roles

About OpticoreOpticore is a photonic computing company building the next generation of energy-efficient AI hardware. Spun out of MIT and based in Berkeley, CA, we are a Series A startup on a mission to solve the energy and scaling challenges of modern AI computing. Our team is tight-knit, technically deep, and moving fast. All roles are on-site in Berkeley, CA.Director of Business DevelopmentAbout the Role You will be Opticore's first commercial hire and the person who gets us in front of the right buyers. Our photonic AI inference chips are being built for the data center, hyperscaler, AI cloud, and high-performance computing markets — and the most important thing you bring is the ability to pick up the phone and reach the person who actually makes compute infrastructure decisions at those organizations.This is a pipeline-first role. The immediate job is identifying target accounts, navigating to the right technical and business stakeholders, and securing early pilot engagements that prove out the technology in real customer environments. Over time, you will build and lead Opticore's sales and business development organization.ResponsibilitiesMap the buying landscape across hyperscalers, AI-native cloud providers, national labs, DoD HPC programs, and Tier 1 data center operators — and identify the right point of contact at eachBuild and own Opticore's early commercial pipeline: outreach, relationships, pilot structuring, and follow-throughLead customer conversations, translating Opticore's photonic computing capabilities into concrete value for infrastructure and AI compute buyersStructure and negotiate early partnership, evaluation, and pilot agreementsFeed customer requirements and market signals back to the engineering and product teams to inform the hardware roadmapRepresent Opticore at industry events, conferences, and in the broader AI compute ecosystemHire and build the sales and business development team as Opticore scales toward commercializationRequirementsDeep, active network across the data center, AI compute, HPC, or supercomputing ecosystem — the ability to quickly identify and reach the right decision-maker at a target accountDemonstrated track record of building commercial pipeline from scratch at an early-stage hardware, semiconductor, or AI infrastructure companyExperience navigating long enterprise procurement and partnership cycles, including pilot and evaluation agreementsAbility to hold a substantive technical conversation about AI inference infrastructure, compute architecture, or data center hardware — enough to be credible with infrastructure and chip architectsComfortable operating as a sole contributor before a team exists, then transitioning into building and leading that teamNice to HavePrior experience selling to or partnering with hyperscalers (AWS, Azure, GCP, Meta) or AI-native cloud providers (CoreWeave, Lambda Labs, etc.)Relationships at national labs or DoD HPC programs (LLNL, Argonne, AFRL, etc.)Background in semiconductor, photonics, or AI hardware companiesExperience as a first commercial hire at a deep tech or hardware startup-------Compiler EngineerAbout the RoleYou build the software infrastructure that makes novel hardware actually usable — and you help shape what that hardware looks like in the first place. At Opticore, you will work alongside our Computer Architect to co-design the ISA and execution model, then own the compiler stack that targets it: from high-level ML model representations down to efficient execution on our photonic computing platform. This is a senior, software-focused role, but you will be in the room for hardware decisions from day one — your job is to make sure the architecture is one a compiler can actually exploit, and then prove it by building that compiler.ResponsibilitiesPartner with the System Architect to co-define the ISA, execution model, and hardware-software interface — ensuring architectural decisions are compiler-friendly from the startDesign and implement the compiler stack for Opticore's photonic platform — IR design, lowering passes, code generation, and runtime interfacesMap LLM and AI inference workloads to photonic execution: tiling, scheduling, memory layout, and operator fusionBuild performance analysis and profiling infrastructure to identify bottlenecks and guide optimizationMaintain close, ongoing collaboration with the hardware team — translating hardware constraints into compiler representations and feeding compiler observations back into hardware designContribute to the runtime layer: memory management, execution scheduling, and host-device communicationRequirements7+ years of hands-on compiler engineering experience — MLIR, LLVM, TVM, XLA, or equivalentExperience lowering ML workloads onto custom or non-standard hardware targetsAbility to read and reason about hardware architecture — memory hierarchies, dataflow models, execution pipelines — and participate meaningfully in ISA and execution model designTrack record of working directly with hardware teams to jointly define and refine the hardware-software interfaceSeniority to drive technical decisions independently and influence architecture choices upstreamComfort building from scratch in an environment where the target architecture is co-evolving with the softwareNice to HaveExperience targeting novel or non-von-Neumann accelerators (photonic, analog, neuromorphic, custom ASIC)Background in quantization, sparsity, or other model-level optimizations with hardware implicationsFamiliarity with kernel-level optimization (e.g., Triton, CUDA, or custom kernel authoring for accelerators)Prior experience contributing to an ML framework backend (PyTorch, JAX, etc.)-------Computer ArchitectAbout the RoleYou will define the foundational execution model for Opticore's photonic computing platform. At this stage, the most consequential decisions are architectural — how computation is expressed, how data moves, and where the hardware-software boundary sits. You will work directly with the chip team to design the ISA, memory hierarchy, and execution model from first principles. Everything the software stack is eventually built on depends on getting these decisions right. This is a rare opportunity to define a new compute architecture from scratch, for a genuinely novel class of hardware.ResponsibilitiesDefine the ISA and execution model for Opticore's photonic processorDesign the memory hierarchy, data flow, and compute scheduling modelBuild performance models and simulators to evaluate architectural tradeoffsCo-design with the PIC and EIC teams to ensure hardware-software decisions are made jointly, not in sequenceEstablish the hardware-software interface that future compiler and runtime work will targetIdentify architectural opportunities and constraints unique to photonic computingRequirementsDeep background in computer architecture — ISA design, microarchitecture, memory systems, execution modelsExperience building and using performance models or architectural simulatorsStrong understanding of how ML/LLM workloads map to hardwareAbility to reason from first principles about non-von-Neumann or novel compute paradigmsComfortable communicating across hardware and software disciplinesNice to HaveExperience designing custom ISAs or novel accelerator architectures (TPU, NPU, or similar)Familiarity with what makes an ISA compiler-friendly — awareness of the downstream software implicationsPrior work on non-von-Neumann or emerging compute architecturesBackground in quantization, sparsity, or other model-level optimizations with hardware implications