{"schemaVersion":"jobsearcher.job.v1","id":"08d7c25e973018e32a9d88e6","url":"https://jobsearcher.com/jobs/08d7c25e973018e32a9d88e6","canonicalUrl":"https://jobsearcher.com/jobs/08d7c25e973018e32a9d88e6","title":"PCB Layout Engineer","description":"Job Summary\nMeta is seeking an experienced PCB Layout Engineer with advanced expertise in Cadence Allegro PCB and complex, high-density PCB layout. The ideal candidate will have strong experience designing high-speed server and hardware boards involving advanced memory interfaces, PCIe, high-speed digital, analog, mixed-signal, and power domains.\nCadence Allegro Layout 23.1 or higher is mandatory.\nKey Responsibilities\nOwn end-to-end PCB layout for complex, high-density designs used in data center server boards.\nPerform high-speed digital PCB layout for:\nHBM\nDDR4/DDR5\nPCIe Gen 5/Gen 6\nUSB 3.2 or higher\nImplement controlled impedance, length matching, and crosstalk mitigation.\nDevelop and enforce PCB layout design rules across high-speed digital, analog, mixed-signal, and power domains.\nCollaborate with electrical engineers to review schematics and provide layout-driven feedback.\nProvide recommendations regarding component placement, power distribution, and signal routing.\nPartner with mechanical engineers to resolve board outline, connector placement, thermal, and stack-up constraints.\nDrive DFM reviews with contract manufacturers and PCB fabricators.\nEnsure PCB layouts meet quality, yield, and reliability requirements.\nMaintain and improve PCB design standards, layer stack-up libraries, and footprint libraries.\nSupport prototype and production boards with layout documentation, net tracing, and design revision analysis.\nRequired Skills & QualificationsPCB CAD / Layout\nAdvanced proficiency in Cadence Allegro PCB for PCB layout and design.\nCadence Allegro Layout 23.1 or higher – Mandatory.\n10–14 years of CAD experience.\nStrong knowledge of CAD software for 2D and 3D design applications.\nHands-on experience with HDI microvia technology, including blind and buried vias.\nHigh-Speed PCB Design\nExperience designing complex SoC, microprocessor, or FPGA-based PCBs.\nExperience with high-density, high-speed memory designs such as:\nDDR5\nLPDDR5\nHBM\nExperience with PCIe Gen 5 / Gen 6.\nExperience with power delivery and mixed analog/digital PCB designs.\nStrong knowledge of high-speed signal integrity and constraint-driven design.\nConstraints & Manufacturing\nDeep knowledge of Cadence Constraint Editor (CES).\nExperience with high-speed constraint-driven PCB designs.\nStrong understanding of:\nDFA – Design for Assembly\nDFM – Design for Manufacturing\nDFT – Design for Test\nExperience ensuring PCB fabrication and assembly quality.\nPreferred Experience\nIntel-based or similarly complex SoC/microprocessor/FPGA PCB design experience.\nData center server board design experience.\nExperience working with contract manufacturers and PCB fabricators.\nExperience with complex multilayer and HDI PCB technologies.\nExperience supporting prototype-to-production hardware development.\nPay: $80.00 - $85.00 per hour\nApplication Question(s):\nAdvanced proficiency in Cadence Allegro PCB for PCB layout and design.\nCadence Allegro Layout 23.1 or higher – Mandatory.\n10–14 years of CAD experience.\nHands-on experience with HDI microvia technology, including blind and buried vias.\nWork Location: In person","company":"Infoway Solutions","rawCompany":"infoway solutions","city":"Menlo Park","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-08-13T14:36:43.631Z","occupations":[{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"},{"code":"17-3012.00","title":"Electrical and Electronics Drafters","slug":"electrical-and-electronics-drafters"},{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"}],"industries":[{"code":"334418","title":"Printed Circuit Assembly (Electronic Assembly) Manufacturing","slug":"printed-circuit-assembly-electronic-assembly-manufacturing"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"334412","title":"Bare Printed Circuit Board Manufacturing","slug":"bare-printed-circuit-board-manufacturing"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"PCB Layout Engineer","description":"Job Summary\nMeta is seeking an experienced PCB Layout Engineer with advanced expertise in Cadence Allegro PCB and complex, high-density PCB layout. The ideal candidate will have strong experience designing high-speed server and hardware boards involving advanced memory interfaces, PCIe, high-speed digital, analog, mixed-signal, and power domains.\nCadence Allegro Layout 23.1 or higher is mandatory.\nKey Responsibilities\nOwn end-to-end PCB layout for complex, high-density designs used in data center server boards.\nPerform high-speed digital PCB layout for:\nHBM\nDDR4/DDR5\nPCIe Gen 5/Gen 6\nUSB 3.2 or higher\nImplement controlled impedance, length matching, and crosstalk mitigation.\nDevelop and enforce PCB layout design rules across high-speed digital, analog, mixed-signal, and power domains.\nCollaborate with electrical engineers to review schematics and provide layout-driven feedback.\nProvide recommendations regarding component placement, power distribution, and signal routing.\nPartner with mechanical engineers to resolve board outline, connector placement, thermal, and stack-up constraints.\nDrive DFM reviews with contract manufacturers and PCB fabricators.\nEnsure PCB layouts meet quality, yield, and reliability requirements.\nMaintain and improve PCB design standards, layer stack-up libraries, and footprint libraries.\nSupport prototype and production boards with layout documentation, net tracing, and design revision analysis.\nRequired Skills & QualificationsPCB CAD / Layout\nAdvanced proficiency in Cadence Allegro PCB for PCB layout and design.\nCadence Allegro Layout 23.1 or higher – Mandatory.\n10–14 years of CAD experience.\nStrong knowledge of CAD software for 2D and 3D design applications.\nHands-on experience with HDI microvia technology, including blind and buried vias.\nHigh-Speed PCB Design\nExperience designing complex SoC, microprocessor, or FPGA-based PCBs.\nExperience with high-density, high-speed memory designs such as:\nDDR5\nLPDDR5\nHBM\nExperience with PCIe Gen 5 / Gen 6.\nExperience with power delivery and mixed analog/digital PCB designs.\nStrong knowledge of high-speed signal integrity and constraint-driven design.\nConstraints & Manufacturing\nDeep knowledge of Cadence Constraint Editor (CES).\nExperience with high-speed constraint-driven PCB designs.\nStrong understanding of:\nDFA – Design for Assembly\nDFM – Design for Manufacturing\nDFT – Design for Test\nExperience ensuring PCB fabrication and assembly quality.\nPreferred Experience\nIntel-based or similarly complex SoC/microprocessor/FPGA PCB design experience.\nData center server board design experience.\nExperience working with contract manufacturers and PCB fabricators.\nExperience with complex multilayer and HDI PCB technologies.\nExperience supporting prototype-to-production hardware development.\nPay: $80.00 - $85.00 per hour\nApplication Question(s):\nAdvanced proficiency in Cadence Allegro PCB for PCB layout and design.\nCadence Allegro Layout 23.1 or higher – Mandatory.\n10–14 years of CAD experience.\nHands-on experience with HDI microvia technology, including blind and buried vias.\nWork Location: In person","datePosted":"2026-08-13T14:36:43.631Z","dateModified":"2026-08-13T14:36:43.631Z","hiringOrganization":{"@type":"Organization","name":"Infoway Solutions","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Menlo Park","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"08d7c25e973018e32a9d88e6"},"url":"https://jobsearcher.com/jobs/08d7c25e973018e32a9d88e6"}}