{"schemaVersion":"jobsearcher.job.v1","id":"078fe99d3d09937ff4b49d69","url":"https://jobsearcher.com/jobs/078fe99d3d09937ff4b49d69","canonicalUrl":"https://jobsearcher.com/jobs/078fe99d3d09937ff4b49d69","title":"Senior CPU Microarchitecture & Logic Design Engineer, Fetch and Decode","description":"We are seeking a talented Senior Staff CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance CPU subsystems, with a focus on achieving optimal power, performance, and area (PPA). You will work closely with cross-functional teams to develop innovative solutions, refine microarchitecture, and validate designs. This is an opportunity to work on cutting-edge projects and make a significant impact on the future of CPU technology in a collaborative and fast-paced environment.\nResponsibilities Define, develop, and drive microarchitecture specifications for complex CPU subsystems with a focus on Branch Prediction, Instruction Fetch, and Instruction Decode.\nCollaborate closely with the verification team to establish effective verification strategies for new designs. Support testbench development and assist verification engineers in testing and debugging core and subsystem-level RTL in simulation, prototyping platforms, and silicon.\nFront-end RTL design and optimization to achieve power, performance, area, and timing objectives.\nCoordinate with core-wide and cross-discipline engineering teams to implement RTL in physical design, ensuring adherence to layout, reliability, interface behavior, and testability requirements.\nProvide technical leadership, mentoring junior engineers and contributing to long-term CPU core architecture roadmaps.\nCreate and effectively communicate technical details to team members.\nQualifications & Skills: Minimum Qualifications: 5-10 years of experience in CPU microarchitecture and RTL design.\nExtensive experience with high-performance instruction fetch, branch prediction, instruction decode, and instruction caches.\nIn-depth knowledge of microprocessor frontend architecture and microarchitecture, including expertise in optimization techniques and trade-offs between performance, power, and area (PPA).\nThe ability to anticipate difficulties in physical design realities and rapidly adapt to evolving circumstances.\nStrong proficiency in SystemVerilog and hardware design methodologies.\nExpert experience with front-end tools such as Verilog simulators and emulators, waveform viewers, logic synthesis, and place-and-route.\n\nPreferred Qualifications: Expertise with rapid instruction fetch, highly accurate branch prediction, and high bandwidth instruction decoding for allocation.\nA deep technical background encompassing prediction algorithms and structures, prefetching, and accelerated flush/clear recovery.\nFamiliarity with RISC-V ISA and major extensions.\nAbility to influence and define work models, coding standards, and design methodologies for large-scale CPU projects.\n\nWhat We Offer: Competitive salary and benefits package.\nOpportunities for professional growth in an innovative startup environment.\nCollaboration with talented engineers passionate about cutting-edge CPU technologies.\nA flexible and inclusive work culture based in Portland, OR or Austin, TX.\nApply for this position Personal information First name Last name Email Address Phone number Nationality\nYour resume Your LinkedIn Profile Upload your Resume/CV Upload File Max file size 10MB. Upload your coverletter Upload File Max file size 10MB.\n\n#J-18808-Ljbffr","company":"Aheadcomputing","rawCompany":"aheadcomputing","city":"Austin","state":"TX","isRemote":false,"isActive":true,"createdAt":"2026-06-20T04:44:15.350Z","occupations":[{"code":"17-2061.00","title":"Computer Hardware Engineers","slug":"computer-hardware-engineers"},{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"},{"code":"17-2072.00","title":"Electronics Engineers, Except Computer","slug":"electronics-engineers-except-computer"}],"industries":[{"code":"334413","title":"Semiconductor and Related Device Manufacturing","slug":"semiconductor-and-related-device-manufacturing"},{"code":"334111","title":"Electronic Computer Manufacturing","slug":"electronic-computer-manufacturing"},{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Senior CPU Microarchitecture & Logic Design Engineer, Fetch and Decode","description":"We are seeking a talented Senior Staff CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance CPU subsystems, with a focus on achieving optimal power, performance, and area (PPA). You will work closely with cross-functional teams to develop innovative solutions, refine microarchitecture, and validate designs. This is an opportunity to work on cutting-edge projects and make a significant impact on the future of CPU technology in a collaborative and fast-paced environment.\nResponsibilities Define, develop, and drive microarchitecture specifications for complex CPU subsystems with a focus on Branch Prediction, Instruction Fetch, and Instruction Decode.\nCollaborate closely with the verification team to establish effective verification strategies for new designs. Support testbench development and assist verification engineers in testing and debugging core and subsystem-level RTL in simulation, prototyping platforms, and silicon.\nFront-end RTL design and optimization to achieve power, performance, area, and timing objectives.\nCoordinate with core-wide and cross-discipline engineering teams to implement RTL in physical design, ensuring adherence to layout, reliability, interface behavior, and testability requirements.\nProvide technical leadership, mentoring junior engineers and contributing to long-term CPU core architecture roadmaps.\nCreate and effectively communicate technical details to team members.\nQualifications & Skills: Minimum Qualifications: 5-10 years of experience in CPU microarchitecture and RTL design.\nExtensive experience with high-performance instruction fetch, branch prediction, instruction decode, and instruction caches.\nIn-depth knowledge of microprocessor frontend architecture and microarchitecture, including expertise in optimization techniques and trade-offs between performance, power, and area (PPA).\nThe ability to anticipate difficulties in physical design realities and rapidly adapt to evolving circumstances.\nStrong proficiency in SystemVerilog and hardware design methodologies.\nExpert experience with front-end tools such as Verilog simulators and emulators, waveform viewers, logic synthesis, and place-and-route.\n\nPreferred Qualifications: Expertise with rapid instruction fetch, highly accurate branch prediction, and high bandwidth instruction decoding for allocation.\nA deep technical background encompassing prediction algorithms and structures, prefetching, and accelerated flush/clear recovery.\nFamiliarity with RISC-V ISA and major extensions.\nAbility to influence and define work models, coding standards, and design methodologies for large-scale CPU projects.\n\nWhat We Offer: Competitive salary and benefits package.\nOpportunities for professional growth in an innovative startup environment.\nCollaboration with talented engineers passionate about cutting-edge CPU technologies.\nA flexible and inclusive work culture based in Portland, OR or Austin, TX.\nApply for this position Personal information First name Last name Email Address Phone number Nationality\nYour resume Your LinkedIn Profile Upload your Resume/CV Upload File Max file size 10MB. Upload your coverletter Upload File Max file size 10MB.\n\n#J-18808-Ljbffr","datePosted":"2026-06-20T04:44:15.350Z","dateModified":"2026-06-20T04:44:15.350Z","hiringOrganization":{"@type":"Organization","name":"Aheadcomputing","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Austin","addressRegion":"TX","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"078fe99d3d09937ff4b49d69"},"url":"https://jobsearcher.com/jobs/078fe99d3d09937ff4b49d69"}}