{"schemaVersion":"jobsearcher.job.v1","id":"04924b968c8655d49173655f","url":"https://jobsearcher.com/jobs/04924b968c8655d49173655f","canonicalUrl":"https://jobsearcher.com/jobs/04924b968c8655d49173655f","title":"Model Bring-up Engineer / ML Compiler Engineer","description":"About Us\n\nWe are the first AI inference neocloud, using ASIC compute to generate tokens 5–7× faster than existing GPU-based competitors. We just closed an oversubscribed seed round and quadrupled our compute allocation to $97M. Multiple lender conversations are live on a $200M asset-backed equipment facility.\n\nAbout the role\n\nYou'll take a new model and get it running — correctly — on our ASIC in record time. When a frontier model drops, the only question that matters is how fast we can land it on our silicon and start serving it. You own that loop: from reference weights, through the compiler, to first correct tokens. The low-level runtime is co-owned with our hardware partner today; your job is everything it takes to get a brand-new architecture compiled, verified, and fast on top of it.\n\nThe bet of this role is that bring-up should be an agentic loop, not a hand-port. You'll build the harness of agents that compiles, runs, diffs against reference, and localizes failures — so the marginal model comes up faster than the last one did. Correctness first, optimization second: get it right, prove it's right, then make it cheap. This is a senior IC role on a small team. You'll own the bring-up pipeline, not tickets.\n\nWhat You'll Do:\n\nOwn model bringup end-to-end. Take a new architecture — a frontier LLM, an MoE, a multimodal model — from reference weights to first correct tokens running on our ASIC, in days, not quarters.\n\nBuild the agentic bringup loop. The differentiator isn't hand-porting one model — it's the harness of agents that compiles, runs, diffs against reference, localizes the failing op, and iterates without you in the inner loop. Each model you land should make the loop better at landing the next one.\n\nLive in the compiler. Graph capture, IR lowering, op coverage, kernel selection — when a model won't compile or produces wrong numbers, the fix is yours, whether it's a missing lowering, a fused-kernel bug, or a numerics mismatch.\n\nOwn correctness before speed. Build the verification harness — layer-by-layer activation diffs, logit parity, end-to-end evals — that proves a freshly brought-up model matches reference before anyone trusts a token of it.\n\nThen optimize. Once it's correct, make it fast: operator fusion, quantization, memory layout, batching and KV-cache behavior on our hardware. Bringup gets it running; this is where it earns its cost-per-token.\n\nWork shoulder-to-shoulder with our hardware partner's compiler and runtime team. You're the person who turns 'the chip can technically run this' into 'this model is live and correct in production.\n\nWhat we need from you:\n\n5+ years in systems or ML systems, with real depth in at least one of: ML compilers, model porting/bringup, or high-performance kernels.\n\nYou've taken a model architecture you didn't design and made it run — and run correctly — on a target it wasn't written for. Numerics debugging doesn't scare you.\n\nStrong on the internals of modern LLM inference: transformers, attention, KV cache, MoE routing, quantization, batching. You can read a new model's reference implementation and know what will be hard to lower.\n\nComfortable inside a compiler stack — MLIR/LLVM, XLA, or a vendor graph compiler — at the level of IR, lowering, and op coverage, not just calling into one.\n\nFluent with agentic tooling. You'd rather build the agent that runs the tedious bringup loop than run it by hand — and you have the taste to know where the loop still needs a human.\n\nSelf-directed. We don't assign tickets — you'll see the next model coming and have it half brought-up before anyone asks.\n\nNice-to-haves:\n\nHave worked on a non-NVIDIA accelerator — TPU, Trainium/Inferentia, Tenstorrent, Groq, Cerebras, or similar — at the compiler or model-bringup layer.\n\nKernel-level experience in CUDA, Triton, or a vendor kernel language. You know why a fused attention kernel beats three unfused ops.\n\nHave built eval and numerics-verification harnesses (logit parity, activation diffing) for models in production.\n\nContributed to a graph compiler or serving runtime — XLA, TVM, MLIR, vLLM, TGI, TensorRT-LLM, or SGLang.\n\nHave built agent loops or LLM-driven tooling that did real engineering work, not demos.","company":"General Compute","rawCompany":"general compute","city":"Millbrae","state":"CA","isRemote":false,"isActive":false,"createdAt":"2026-08-06T09:45:18.059Z","occupations":[{"code":"15-1299.08","title":"Computer Systems Engineers/Architects","slug":"computer-systems-engineers-architects"},{"code":"15-1221.00","title":"Computer and Information Research Scientists","slug":"computer-and-information-research-scientists"},{"code":"15-1252.00","title":"Software Developers","slug":"software-developers"}],"industries":[{"code":"541511","title":"Custom Computer Programming Services","slug":"custom-computer-programming-services"},{"code":"513210","title":"Software Publishers","slug":"software-publishers"},{"code":"541512","title":"Computer Systems Design Services","slug":"computer-systems-design-services"}],"jobPosting":{"@context":"https://schema.org","@type":"JobPosting","title":"Model Bring-up Engineer / ML Compiler Engineer","description":"About Us\n\nWe are the first AI inference neocloud, using ASIC compute to generate tokens 5–7× faster than existing GPU-based competitors. We just closed an oversubscribed seed round and quadrupled our compute allocation to $97M. Multiple lender conversations are live on a $200M asset-backed equipment facility.\n\nAbout the role\n\nYou'll take a new model and get it running — correctly — on our ASIC in record time. When a frontier model drops, the only question that matters is how fast we can land it on our silicon and start serving it. You own that loop: from reference weights, through the compiler, to first correct tokens. The low-level runtime is co-owned with our hardware partner today; your job is everything it takes to get a brand-new architecture compiled, verified, and fast on top of it.\n\nThe bet of this role is that bring-up should be an agentic loop, not a hand-port. You'll build the harness of agents that compiles, runs, diffs against reference, and localizes failures — so the marginal model comes up faster than the last one did. Correctness first, optimization second: get it right, prove it's right, then make it cheap. This is a senior IC role on a small team. You'll own the bring-up pipeline, not tickets.\n\nWhat You'll Do:\n\nOwn model bringup end-to-end. Take a new architecture — a frontier LLM, an MoE, a multimodal model — from reference weights to first correct tokens running on our ASIC, in days, not quarters.\n\nBuild the agentic bringup loop. The differentiator isn't hand-porting one model — it's the harness of agents that compiles, runs, diffs against reference, localizes the failing op, and iterates without you in the inner loop. Each model you land should make the loop better at landing the next one.\n\nLive in the compiler. Graph capture, IR lowering, op coverage, kernel selection — when a model won't compile or produces wrong numbers, the fix is yours, whether it's a missing lowering, a fused-kernel bug, or a numerics mismatch.\n\nOwn correctness before speed. Build the verification harness — layer-by-layer activation diffs, logit parity, end-to-end evals — that proves a freshly brought-up model matches reference before anyone trusts a token of it.\n\nThen optimize. Once it's correct, make it fast: operator fusion, quantization, memory layout, batching and KV-cache behavior on our hardware. Bringup gets it running; this is where it earns its cost-per-token.\n\nWork shoulder-to-shoulder with our hardware partner's compiler and runtime team. You're the person who turns 'the chip can technically run this' into 'this model is live and correct in production.\n\nWhat we need from you:\n\n5+ years in systems or ML systems, with real depth in at least one of: ML compilers, model porting/bringup, or high-performance kernels.\n\nYou've taken a model architecture you didn't design and made it run — and run correctly — on a target it wasn't written for. Numerics debugging doesn't scare you.\n\nStrong on the internals of modern LLM inference: transformers, attention, KV cache, MoE routing, quantization, batching. You can read a new model's reference implementation and know what will be hard to lower.\n\nComfortable inside a compiler stack — MLIR/LLVM, XLA, or a vendor graph compiler — at the level of IR, lowering, and op coverage, not just calling into one.\n\nFluent with agentic tooling. You'd rather build the agent that runs the tedious bringup loop than run it by hand — and you have the taste to know where the loop still needs a human.\n\nSelf-directed. We don't assign tickets — you'll see the next model coming and have it half brought-up before anyone asks.\n\nNice-to-haves:\n\nHave worked on a non-NVIDIA accelerator — TPU, Trainium/Inferentia, Tenstorrent, Groq, Cerebras, or similar — at the compiler or model-bringup layer.\n\nKernel-level experience in CUDA, Triton, or a vendor kernel language. You know why a fused attention kernel beats three unfused ops.\n\nHave built eval and numerics-verification harnesses (logit parity, activation diffing) for models in production.\n\nContributed to a graph compiler or serving runtime — XLA, TVM, MLIR, vLLM, TGI, TensorRT-LLM, or SGLang.\n\nHave built agent loops or LLM-driven tooling that did real engineering work, not demos.","datePosted":"2026-08-06T09:45:18.059Z","dateModified":"2026-08-06T09:45:18.059Z","hiringOrganization":{"@type":"Organization","name":"General Compute","sameAs":"https://jobsearcher.com"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Millbrae","addressRegion":"CA","addressCountry":"US"}},"identifier":{"@type":"PropertyValue","name":"JobSearcher","value":"04924b968c8655d49173655f"},"url":"https://jobsearcher.com/jobs/04924b968c8655d49173655f"}}