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We encourage you to apply if you have any of these preferred skills or experiences: Experience with OVM / UVM design verification methodology: bash/csh, Perl, TCL, Python or similar scripting languages; VHDL or similar hardware description languages.
$134,959 - $149,000 a yearFull-timeExpandApply NowActive JobUpdated 5 days ago - UpvoteDownvoteShare Job
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Planning and executing board-level verification tests, such as high-speed signal integrity, digital link characterization, power supply performance, and performance over temperature. Programming or scripting experience, such as Python, LabVIEW, SQL, MATLAB, or Embedded C.
$98,000 - $118,000 a yearFull-timeExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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The Integration and Test Division is seeking a Principal Systems Integration and Test Engineer to lead the verification and validation of complex systems in the following Draper core capabilities: inertial measurement, GN&C, physical sensing and timing, high assurance systems, design for harsh environments, complex system miniaturization, comms and RF systems, cyber-physical systems security, and electromechanical systems.
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You will be working with architects and designers to define the verification strategy for the design, develop and review test plans, execute the test plans using industry standard tools like System Verilog and UVM. You will contribute to the overall success of the product and business by ensuring high quality through detail-oriented industry standard verification leading to tape out.
Full-timeExpandApply NowActive JobUpdated 6 days ago - UpvoteDownvoteShare Job
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LER TechForce is looking for a System Verification Engineer to help support aircraft engine product development. As a Systems Verification Engineer, you will play a critical role in ensuring the reliability, functionality, and performance of our systems through rigorous testing and requirements verification.
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As a Design Verification Engineer, You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure.
ExpandApply NowActive JobUpdated 3 days ago - UpvoteDownvoteShare Job
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Highly proficient in logic design, Verilog and/or System-Verilog, with a deep understanding of physical design and VLSI.Strengths in scripting languages such as Perl, Python. Support hardware engineering activities including chip floor plan, power/clock distribution, chip assembly, timing closure, power and noise analysis, and back-end verification.
$156,000 - $287,500 a yearFull-timeExpandApply NowActive JobUpdated 3 months ago - UpvoteDownvoteShare Job
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Experience with SystemVerilog, Verilog and scripting in Perl/Python. Familiarity with verification environments and Verilog, C/C. The SoC Performance Verification is a critical job within Apples Hardware Technology.
Full-timeExpandApply NowActive JobUpdated 8 days ago - UpvoteDownvoteShare Job
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Experience with 1 or more scripting languages such as Bash, Python, Perl, PowerShell, etc. Execute verification and validation testing for customer mitigations and fixesQualifications: Experience in performing penetration testing on enterprise web applications, microservice and mobile applications.
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As an SOC Design Verification Engineer, you will play a vital role in verifying and validating complex hardware systems, ensuring their functionality and performance. Verilog, System Verilog, UVM, assembly, and Python.
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The Dojo team is seeking a Design Verification Engineer who will be responsible for pre-silicon RTL verification and some post-silicon validation. Interact with cross functional teams and work on multiple domains spanning verification with UVM, validation with C and Python.
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This critical role in Digital Technology is an exciting opportunity to join our growing DevOps and Classified Engineering Solutions organization as a DevOps/Site Reliability Engineer (SRE). Experience and familiarity with relational databases and ability to support/troubleshoot data backup, verification and validation activities for server-based tools and solutions (Oracle, SQL Server, InfluxDB, PostgreSQL, MySQL.
$77,000 - $163,000Full-timeExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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Immediate need for a talented FPGA Engineer (Design & Verification- UVM Framework). Hands-on experience with board, module, and system level electronic troubleshooting , including experience with engineering test equipment such as logic analyzers and bus analyzers bash/perl/python scripting a big plus for verification, validation, and process automation.
Full-timeExpandUpdated 21 days ago - UpvoteDownvoteShare Job
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Knowledge of emulation/FPGA/firmwareExperience with system coherency verification. Define and review verification and validation test plans at the integration and SOC full-chip levels. Are you an innovative and detail-oriented professional seeking to make a significant impact in the field of SOC Design Verification.
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Course and Practical usage in RTL design, design verification, synthesis & formalityProficiency in SystemVerilog development languagesCourse and Practical usage in Static Timing Analysis and Verilog simulation toolsShould be able to design complex state machines & data path logicProficiency in scripting languages (TCL / Perl / Python) and LINUX.Ability to understand and implement industry standards.
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