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Ellsworth Corporation, a global, industry leading distributor of specialty chemicals and equipment and adhesive manufacturer currently has a Financial Planning & Analysis Manager opportunity at Ellsworth Adhesives.
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You will be responsible for interfacing with internal and external Honeywell ASIC-capability development teams and translating our mixed signal designs and digital library cells using Cadence and Mentor tools for physical design and verification.
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You will assist in driving corporate financial planning and analysis in support of the broader finance strategy partnering with key stakeholders including executive leadership, the board of directors, CFO, and finance leadership team.
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Realize IC layout with floor planning and performance considerations (with layout engineers) - Experience with Cadence IC design tools. Deep understanding on device physics, device reliability analysis, package, and PCB design considerations.
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You will work closely with world class hardware and mixed signal-ASIC tool flow development engineers during planning, requirements and architecture, design, test, and integration phases. Cadence PDK and Siemens-EDA physical verification for library item development.
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The candidate should be able work independently on both top level floor planning and assembly, and block level and IP level layout of analog and high speed digital design. Additionally, candidate should be proficient with either Ansys Totem or Cadence VoltageStorm for IR drop and EM analysis.
$126,000 - $210,000 a yearFull-timeExpandApply NowActive JobUpdated 16 days ago - UpvoteDownvoteShare Job
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The Mechanical Commissioning Engineer will support the development of the mechanical test schedule, finalize mechanical test procedures, review project submittals for consistency with the design intent, basis of design and the owner's project requirements, and maintain project cadence for the mechanical systems testing and associated Building Automation Systems.
$72,800 - $85,500 a yearFull-timeExpandApply NowActive JobUpdated Today - UpvoteDownvoteShare Job
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Quickly establish a consistent SBA business development cadence in the marketplace which includes but is not limited to, Call Planning and Follow-Up, Client Retention Calls, New Client Prospecting, Outbound Telephone Calling Efforts, Networking Events.
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Design, integrate and validate ISP data pipes according to PRD/design specification and system architecture of SoC CIS products, following ASIC design flow: coding, simulation, synthesis, static timing analysis, formality verification, DFT, using Simvision, EDA tools such as Prime Time, cadence Virtuoso, Design Compiler, Integrator, and Verilog and System Verilog programming languages etc.
$126,464 - $130,000 a yearFull-timeExpandApply NowActive JobUpdated 2 days ago - UpvoteDownvoteShare Job
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Support the cadence of the business: Annual Planning, Quarterly business reviews, Weekly Forecasting calls and Pipeline reviews. Fertility & family planning benefits. backed by firms such as Permira, Ameriprise Financial, EDBI, Lightspeed Venture Partners, and T. Rowe Price.
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The Capital Planning team within Citi Treasury is responsible for all aspects of capital analysis, forecasting, and planning for Citi, including providing programmatic leadership for the firm's capital ratios; Basel Risk Weighted Assets (RWA); CCAR; and Recovery & Resolution Planning.
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Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence) Experience planning, architecting, developing, and using constrained random, self-checking test benches in System Verilog 8 plus years/UVM, OVM, and/or VHDL.
$120,000 - $200,000 a yearFull-timeExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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Principal Design Verification Engineer - Defense - 9/80 schedule - Opportunity to advance. We are a large organization working on some of the world's most advanced technology-led defense, aerospace, marine, land, and security solutions.
$120,000 - $200,000 a yearFull-timeExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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Familiarity with Ansys ICEPAK, Sentinel-TI, Fluent, Cadence Allegro, Redhawks SCET, CFD-ACE, or Star CCM is a plus. This position is responsible for: Architecting thermal solutions to address chip energy efficiency and performance scaling, Providing thermal modeling solutions to mobile devices at silicon die and semiconductor package levels, Optimizing advanced IC design scheme/floor-planning to ensure good thermal performance, Developing detailed and reduced-order thermal models Analyzing simulation and measurement results to enhance product thermal management.
$170,700 - $300,200 a yearExpandApply NowActive JobUpdated Yesterday - UpvoteDownvoteShare Job
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Referral services for child, elder and pet care, home and auto repair, event planning and more. VP will establish a regular reporting cadence to Tenet and GPO leadership to ensure that all elements of the supply expense management plan are being accomplished.
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