A working knowledge in semiconductor manufacturing, wafer handling systems and servo control systems. Product Development Engineer (Wafer, Robotic, Servo Control, Automation) page is loaded.

The ideal candidate will have expertise in semiconductor device physics with wide-ranging hands-on experience in RF semiconductor device fabrication and operation, RF device modeling and circuit design, RF test development and execution, device-level reliability failure mechanisms and testing, MMIC process development and qualification, process design kit development/validation, and wafer foundry manufacturing operations.

Senior Semiconductor Device Engineer San Jose, CA. Good understanding of semiconductor device physics. A minimum of 5 years’ experience in semiconductor device and technology development.

2) Knowledge of Image sensor semiconductor high-volume manufacturing processes, practices, and techniques for both wafer manufacturing and testing. 2) 2+ years of experience in image sensor or related field.

To learn how we can supercharge progress for you, visit hcltech.com. HCLTech is looking to hire a Test Lead with experience in IC Design, Wafer Inspection, SDLC, etc. Understand IC Design and its use in developing wafer inspection solutions and test cases.

Works closely with global wafer foundry engineering organizations in the management and manufacturing release of product transfers. Oversees analysis of yield at parametric test, wafer sort & final test using data mining software to determine and support the resolution of yield losses.

BSEE with 8+ years experience as an Test Engineer, in telecommunications, computer engineering, computer networking, medical device or related field. Sanmina Corporation (Nasdaq: SANM) is a leading integrated manufacturing solutions provider serving the fastest-growing segments of the global Electronics Manufacturing Services (EMS) market.

Hands-on lab experience on capital equipment, preferably semiconductor manufacturing or metrology equipment. KLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem.

As part of BBP HPC Engr Team, you would be a Design Engineer for an embedded Linux HPC Cluster, part of the KLA Wafer inspection tool. HPC Team is charted to providing innovative HPC Hardware solutions for driving Image processing algorithms for enabling Wafer inspections in real time.

Familiar with process technology, and how it relates to design and testing Data analysis: wafer sort and final test. Familiar with Design for Test (DFT) techniques and structural tests such as Scan/ATPG, JTAG, and memory BIST.

Plus: Experience with electron microscopy (SEM or TEM) and electron beam lithography. Numerical simulation experience in electromagnetics (with commercial software package such as COMSOL) is a plus.

Test Engineering Manager for Core Switching Group (CSG) · 10+ years of direct experience on a production semiconductor manufacturing test floor. · Hands-on experience on wafer sort probing both on hardware and software.

Company OverviewKLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Apply to this posting for Future Opportunities with KLA. Responsible for developing, implementing and testing, advanced optical, electronic, and electro-mechanical subsystems used in wafer inspection tools.

You will have a comprehensive, demonstrable background in power semiconductor materials / semiconductor device physics, and / fabrication process. Perform electrical characterization on SiC power semiconductor devices and the related PCM/TEG structures on the wafer.

The Sr. Photolithography Process Development Engineer works primarily in an office environment from Monday thru Friday. May also work in a class 100 ESD sensitive wafer fab manufacturing facility; adheres to required safety and dress standards.